Lines Matching refs:clk_div
1899 uint32_t clk_div;
1904 * Calculate clk_div - values between 2 and 128
1907 clk_div = 2 * DIV_ROUND_UP(emi_freq, 2 * spi_freq);
1908 if (clk_div < 2)
1909 clk_div = 2;
1910 else if (clk_div > 128)
1911 clk_div = 128;
1919 if (clk_div <= 4)
1921 else if (clk_div <= 10)
1924 fsm->fifo_dir_delay = DIV_ROUND_UP(clk_div, 10);
1926 dev_dbg(fsm->dev, "emi_clk = %uHZ, spi_freq = %uHZ, clk_div = %u\n",
1927 emi_freq, spi_freq, clk_div);
1929 writel(clk_div, fsm->base + SPI_CLOCKDIV);