#
326563fd |
|
08-Oct-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
mtd: st_spi_fsm: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/linux-mtd/20231008200143.196369-9-u.kleine-koenig@pengutronix.de
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#
1726813c |
|
06-Jul-2023 |
Yangtao Li <frank.li@vivo.com> |
mtd: st_spi_fsm: Convert to devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <frank.li@vivo.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230707040622.78174-16-frank.li@vivo.com
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#
a2c2690f |
|
16-Apr-2023 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
mtd: st_spi_fsm: Use the devm_clk_get_enabled() helper function Use the devm_clk_get_enabled() helper function instead of hand-writing it. It saves some line of codes. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/4025ec3980a956b0e776024e88ec960afc457501.1681636580.git.christophe.jaillet@wanadoo.fr
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#
6f6536a0 |
|
07-Jun-2022 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
mtd: st_spi_fsm: Simplify error checking in .probe() a bit Instead of ending each if branch with the same check, do it once unconditionally after the if block. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220607152458.232847-5-u.kleine-koenig@pengutronix.de
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#
cd043c61 |
|
07-Jun-2022 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
mtd: st_spi_fsm: Disable clock only after device was unregistered Until mtd_device_unregister() returns the device is expected to be operational. So only disable the clock after the mtd is unregistered. Fixes: 1fefc8ecb834 ("mtd: st_spi_fsm: add missing clk_disable_unprepare() in stfsm_remove()") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220607152458.232847-4-u.kleine-koenig@pengutronix.de
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#
cfa7847f |
|
07-Jun-2022 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
mtd: st_spi_fsm: Warn about failure to unregister mtd device mtd_device_unregister() shouldn't fail. Wail loudly if it does anyhow. This matches how other drivers (e.g. nand/raw/nandsim.c) use mtd_device_unregister(). By returning 0 in the platform remove callback a generic error message by the device core is suppressed, nothing else changes. This is a preparation for making platform remove callbacks return void. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220607152458.232847-3-u.kleine-koenig@pengutronix.de
|
#
28607b42 |
|
07-Jun-2022 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
mtd: st_spi_fsm: Add a clk_disable_unprepare() in .probe()'s error path For all but one error path clk_disable_unprepare() is already there. Add it to the one location where it's missing. Fixes: 481815a6193b ("mtd: st_spi_fsm: Handle clk_prepare_enable/clk_disable_unprepare.") Fixes: 69d5af8d016c ("mtd: st_spi_fsm: Obtain and use EMI clock") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220607152458.232847-2-u.kleine-koenig@pengutronix.de
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#
1fefc8ec |
|
16-May-2022 |
Yang Yingliang <yangyingliang@huawei.com> |
mtd: st_spi_fsm: add missing clk_disable_unprepare() in stfsm_remove() Clock source is prepared and enabled by clk_prepare_enable() in probe function, but not disabled or unprepared in remove function. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220516092911.953066-1-yangyingliang@huawei.com
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#
106a3ec3 |
|
08-Jan-2021 |
Zheng Yongjun <zhengyongjun3@huawei.com> |
mtd: st_spi_fsm: convert comma to semicolon Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210108092325.19037-1-zhengyongjun3@huawei.com
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#
b34c095c |
|
30-Sep-2019 |
Bartosz Golaszewski <bgolaszewski@baylibre.com> |
mtd: st_spi_fsm: remove unused field from struct stfsm The 'region' field in struct stfsm is unused and can be removed. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
|
#
8d36fe1e |
|
01-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 420 Based on 1 normalized pattern(s): this code is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 6 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190113.627158185@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
e7bfb3fd |
|
12-Feb-2018 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: Stop updating erase_info->state and calling mtd_erase_callback() MTD users are no longer checking erase_info->state to determine if the erase operation failed or succeeded. Moreover, mtd_erase_callback() is now a NOP. We can safely get rid of all mtd_erase_callback() calls and all erase_info->state assignments. While at it, get rid of the erase_info->state field, all MTD_ERASE_XXX definitions and the mtd_erase_callback() function. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Richard Weinberger <richard@nod.at> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Bert Kenward <bkenward@solarflare.com> --- Changes in v2: - Address a few coding style issues (reported by Miquel) - Remove comments that are no longer valid (reported by Miquel)
|
#
f0a37a8d |
|
12-Feb-2018 |
Antonio Cardace <anto.cardace@gmail.com> |
mtd: st_spi_fsm: use %*ph to print small buffer Use %*ph format to print small buffer as hex string. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Antonio Cardace <anto.cardace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
|
#
481815a6 |
|
01-Aug-2017 |
Arvind Yadav <arvind.yadav.cs@gmail.com> |
mtd: st_spi_fsm: Handle clk_prepare_enable/clk_disable_unprepare. - clk_prepare_enable() can fail here and we must check its return value. - stfsm_probe() can fail here and we must disable clock. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
|
#
9447332f |
|
26-Jun-2017 |
Cyrille Pitchen <cyrille.pitchen@microchip.com> |
mtd: st_spi_fsm: remove SPINOR_OP_RDSR2 and use SPINOR_OP_RDCR instead The 35h instruction op code has two aliases/macro definitions: - SPINOR_OP_RDCR from include/linux/mtd/spi-nor.h - SPINOR_OP_RDSR2 from drivers/mtd/devices/serial_flash_cmds.h Actually, some manufacturers name the associated internal register Status Register 2 whereas other manufacturers name it Configuration Register hence the two different macros for the very same instruction op code. Since the spi-nor.h file is the reference file for all SPI NOR instruction op codes, this patch removes the definition of the SPINOR_OP_RDSR2 macro. Also the SPINOR_OP_RDSR2 macro will be associated to another instruction op code in a further patch so we need to avoid a conflict defining this macro twice. Indeed the JESD216 rev B specification, defining the SFDP tables, also refers to the 3Eh and 3Fh instruction op codes to write/read the Status Register 2 on some SPI NOR flash memories, the 35h op code still being used to read the Configuration Register/Status Register 2 on other memories. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
|
#
902cc69a |
|
27-Oct-2016 |
Cyrille Pitchen <cyrille.pitchen@atmel.com> |
mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes This patch renames the SPINOR_OP_* macros of the 4-byte address instruction set so the new names all share a common pattern: the 4-byte address name is built from the 3-byte address name appending the "_4B" suffix. The patch also introduces new op codes to support other SPI protocols such as SPI 1-4-4 and SPI 1-2-2. This is a transitional patch and will help a later patch of spi-nor.c to automate the translation from the 3-byte address op codes into their 4-byte address version. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Marek Vasut <marek.vasut@gmail.com>
|
#
004b5e60 |
|
30-Oct-2015 |
Brian Norris <computersforpeace@gmail.com> |
mtd: drop unnecessary partition parser data We should assign the MTD dev.of_node instead of the parser data field. This gets us the equivalent partition parser behavior with fewer special fields and parameter passing. Also convert several of these to mtd_device_register(), since we don't need the 2nd and 3rd parameters anymore. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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#
a9b679bf |
|
15-Dec-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Fix [-Wsign-compare] build warning drivers/mtd/devices/st_spi_fsm.c:1647:17: warning: comparison between signed and unsigned integer expressions Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
69d5af8d |
|
15-Dec-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Obtain and use EMI clock ST's Common Clk Framework is now available. This patch ensures the FSM makes use of it by obtaining and enabling the EMI clock. If system fails to provide the EMI clock, we bomb out. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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#
5ecd3ea1 |
|
15-Dec-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Extend fsm_clear_fifo to handle unwanted bytes Under certain conditions, the SPI-FSM Controller can be left in a state where the data FIFO is not entirely empty. This can lead to problems where subsequent data transfers appear to have been shifted by a number of unidentified bytes. One simple example would be an errant FSM sequence which loaded more data to the FIFO than was read by the host. Another more interesting case results from an obscure artefact in the FSM Controller. When switching from data transfers in x4 or x2 mode to data transfers in x1 mode, extraneous bytes will appear in the FIFO, unless the previous data transfer was a multiple of 32 cycles (i.e. 8 bytes for x2, and 16 bytes for x4). This applies equally whether FSM is being operated directly by a S/W driver, or by the SPI boot-controller in FSM-Boot mode. Furthermore, data in the FIFO not only survive a transition between FSM-Boot and FSM, but also a S/W reset of IP block [1]. By taking certain precautions, it is possible to prevent the driver from causing this type of problem (e.g. ensuring that the host and programmed sequence agree on the transfer size, and restricting transfer sizes to multiples of 32-cycles [2]). However, at the point the driver is loaded, no assumptions can be made regarding the state of the FIFO. Even if previous S/W drivers have behaved correctly, it is impossible to control the number of transactions serviced by the controller operating in FSM-Boot. To address this problem, we ensure the FIFO is cleared during initialisation, before performing any FSM operations. Previously, the fsm_clear_fifo() code was capable of detecting and clearing any unwanted 32-bit words from the FIFO. This patch extends the capability to handle an arbitrary number of bytes present in the FIFO [3]. Now that the issue is better understood, we also remove the calls to fsm_clear_fifo() following the fsm_read() and fsm_write() operations. The process of actually clearing the FIFO deserves a mention. While the FIFO may contain any number of bytes, the SPI_FAST_SEQ_STA register only reports the number of complete 32-bit words present. Furthermore, data can only be drained from the FIFO by reading complete 32-bit words. With this in mind, a two stage process is used to the clear the FIFO: 1. Read any complete 32-bit words from the FIFO, as reported by the SPI_FAST_SEQ_STA register. 2. Mop up any remaining bytes. At this point, it is not known if there are 0, 1, 2, or 3 bytes in the FIFO. To handle all cases, a dummy FSM sequence is used to load one byte at a time, until a complete 32-bit word is formed; at most, 4 bytes will need to be loaded. [1] Although this issue has existed since early versions of the SPI-FSM controller, its full extent only emerged recently as a consequence of the targetpacks starting to use FSM-Boot(x4) as the default configuration. [2] The requirement to restrict transfers to multiples of 32 cycles was found empirically back when DUAL and QUAD mode support was added. The current analysis now gives a satisfactory explanation for this requirement. [3] Theoretically, it is possible for the FIFO to contain an arbitrary number of bits. However, since there are no known use-cases that leave incomplete bytes in the FIFO, only words and bytes are considered here. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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#
c37c1e16 |
|
20-Oct-2014 |
Wolfram Sang <wsa@kernel.org> |
mtd: devices: drop owner assignment from platform_drivers A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
|
#
aeea6eb4 |
|
07-May-2014 |
Jingoo Han <jg1.han@samsung.com> |
mtd: st_spi_fsm: Make of_device_id array const Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
38e2eee9 |
|
11-Apr-2014 |
Brian Norris <computersforpeace@gmail.com> |
mtd: st_spi_fsm: correct type issues Compile-testing for a 64-bit arch uncovers several bad casts: In file included from include/linux/linkage.h:4:0, from include/linux/kernel.h:6, from drivers/mtd/devices/st_spi_fsm.c:15: drivers/mtd/devices/st_spi_fsm.c: In function ‘stfsm_read_fifo’: drivers/mtd/devices/st_spi_fsm.c:758:11: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] BUG_ON((((uint32_t)buf) & 0x3) || (size & 0x3)); ... Use uintptr_t instead of uint32_t, since it's guaranteed to be pointer-sized. We also see this warning, if size_t is not 32 bits wide: In file included from drivers/mtd/devices/st_spi_fsm.c:15:0: drivers/mtd/devices/st_spi_fsm.c: In function ‘stfsm_mtd_write’: include/linux/kernel.h:712:17: warning: comparison of distinct pointer types lacks a cast [enabled by default] (void) (&_min1 == &_min2); \ ^ drivers/mtd/devices/st_spi_fsm.c:1704:11: note: in expansion of macro ‘min’ bytes = min(FLASH_PAGESIZE - page_offs, len); ^ Just use min_t() to force the type conversion, since we don't really want to upgrade 'page_offs' and 'bytes' to size_t; they only should be handling <= 256 byte offsets. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org>
|
#
6c8e1b33 |
|
08-Apr-2014 |
Brian Norris <computersforpeace@gmail.com> |
mtd: st_spi_fsm: begin using spi-nor.h opcodes Many of the serial_flash_cmds.h opcodes are duplicated with spi-nor.h. Let's begin to unify them. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
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#
92d3af9a |
|
08-Apr-2014 |
Brian Norris <computersforpeace@gmail.com> |
mtd: st_spi_fsm: replace FLACH_CMD_* with SPINOR_OP_* Begin to unify the differences between serial_flash_cmds.h and spi-nor.h. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
|
#
a402191e |
|
08-Apr-2014 |
Brian Norris <computersforpeace@gmail.com> |
mtd: st_spi_fsm: kill duplicate CMD definitions These are also in serial_flash_cmds.h. (FWIW, I didn't know the C preprocessor allowed redefinitions without warning like this.) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de>
|
#
6b6d3737 |
|
26-Mar-2014 |
Angus Clark <angus.clark@st.com> |
mtd: st_spi_fsm: Add support for Macronix MX25L3255E This patch adds support for the Macronix MX25L3255E device. Unlike the other Macronix devices we have seen, this device supports WRITE_1_4_4 at reasonable frequencies. Rather than masking out WRITE_1_4_4 support altogether, we now rely on the table parameters to indicate whether or not WRITE_1_4_4 should be used. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
85bdcf6b |
|
26-Mar-2014 |
Angus Clark <angus.clark@st.com> |
mtd: st_spi_fsm: Add Spansion S25FL032P to device table Add Spansion S25FL032P to the list of known devices. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
5d0bddab |
|
26-Mar-2014 |
Angus Clark <angus.clark@st.com> |
mtd: st_spi_fsm: Refactor status register operations This patch refactors the fsm_read_status() and fsm_write_status() code to support 1 or 2 byte operations, with a specified command. This allows us to remove device/register specific code, such as the N25Q fsm_wrvcr() function. The 'QE' configuration code is updated accordingly, with minor tweaks to ensure the register values are only written if actually required. One notable change in this area is that the 'W25Q_STATUS_QE' bit-field is now defined with respect to the 'SR2' register, rather than the combined 'SR1+SR2' register which is only used for write operations. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
cc666863 |
|
26-Mar-2014 |
Angus Clark <angus.clark@st.com> |
mtd: st_spi_fsm: Update Macronix 'QE' configuration Update the configuration of the Macronix 'QE' bit, such that we only set or clear the bit if required. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
009e7e61 |
|
26-Mar-2014 |
Angus Clark <angus.clark@st.com> |
mtd: st_spi_fsm: Update Macronix 32-bit addressing support Support for the Macronix 32-bit addressing scheme was originally developed using the MX25L25635E device. As is often the case, it was found that the presence of a "WAIT" instruction was required for the "EN4B/EX4B" FSM Sequence to complete. (It is known that the SPI FSM Controller makes certain undocumented assumptions regarding what constitutes a valid sequence.) However, further testing suggested that a small delay was required after issuing the "EX4B" command; without this delay, data corruptions were observed, consistent with the device not being ready to retrieve data. Although the issue was not fully understood, the workaround of adding a small delay was implemented, while awaiting clarification from Macronix. The same behaviour has now been found with a second Macronix device, the MX25L25655E. However, with this device, it seems that the delay is also required after the 'EN4B' commands. This discovery has prompted us to revisit the issue. Although still not conclusive, further tests have suggested that the issue is down to the SPI FSM Controller, rather than the Macronix devices. Furthermore, an alternative workaround has emerged which is to set the WAIT time to 0x00000001, rather then 0x00000000. (Note, the WAIT instruction is used purely for the purpose of achieving "sequence validity", rather than actually implementing a delay!) The issue is now being investigated by the Design and Validation teams. In the meantime, we implement the alternative workaround, which reduces the effective delay from 1us to 1ns. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
5fa98069 |
|
26-Mar-2014 |
Angus Clark <angus.clark@st.com> |
mtd: st_spi_fsm: Add Macronix MX25L25655E device Add Macronix MX25L25655E to the list of known devices. Signed-off-by: Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
d9ba46d3 |
|
20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Succinctly reorganise .remove() Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
ea7864bf |
|
20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Allow loop to run at least once before giving up CPU Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
f1919cb8 |
|
20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Correct vendor name spelling issue - missing "M" Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
0419a203 |
|
20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Avoid duplicating MTD core code Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
3f9d720a |
|
20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Remove useless consts from function arguments Reported-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> [Brian: tweaked a bit] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
|
#
221cff13 |
|
20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Convert ST SPI FSM (NOR) Flash driver to new DT partitions The old API expected a "partitions" property provided a phandle to a separate partitions node, which itself contained yet more nodes each representing one partition. The new API rids the requirement for the superfluous intermediary partitions node. This patch provides the added information required for automatic parsing by the core. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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e6b1bb4e |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Move runtime configurable msg sequences into device's struct Until now the dynamically configurable message sequences for read, write and enable 32bit addressing have been global. Brian makes a good point why this should not be the case. If there are ever two FSM's located on the same platform, we could be potentially introducing a race condition on "needlessly shared data". Suggested-by: Brian Norris <computersforpeace@gmail.com> Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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cd7cac9e |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply the W25Qxxx chip specific configuration call-back Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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5343a123 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply the S25FLxxx chip specific configuration call-back This patch allows us to prepare some of the message sequences which will be required to talk to the S25FLxxx family of Serial Flash devices. It also allows us to do some required extra operations after any busy wait failures. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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89818066 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply the MX25xxx chip specific configuration call-back Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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150571b7 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Add the ability to write to FSM's status register Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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ac94dbcb |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Add the ability to read the FSM's status Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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4a341fe7 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Erase partly or as a whole a Serial Flash device When an erase is requested by userspace the MTD framework calls back into the driver to conduct the actual command issue. Here we provide the routines which do exactly that. We can choose to either do an entire chip erase or by sector. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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176b4377 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply a busy wait for post-write status When we write data to the Serial Flash chip we'll wait a predetermined period of time before giving up. During that period of time we poll the status register until completion. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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30ca64f9 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Write to Flash via the FSM FIFO When we write data to the FIFO the FSM Controller subsequently writes that data out to the Serial Flash chip. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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e514f105 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Add the ability to read from a Serial Flash device When a read is issued by userspace the MTD framework calls back into the driver to conduct the actual command issue and data extraction. Here we provide the routines which do exactly that. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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4eb3f0d8 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Prepare default sequences for read/write/erase Most chips require a predefined set of FSM message sequences for read, write and erase operations. This patch provides a way to set them up, which it will do so if a chip specific initialisation routine isn't been provided. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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218b870f |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply the N25Qxxx chip specific configuration call-back In the FSM driver we handle chip differences by providing the possibility of calling back into a chip specific initialisation routine. In this patch we provide one for the N25Qxxx series, which endeavours to setup things like the read, write and erase sequences, as they differ from the default. We also configure 32bit support and the amount of dummy cycles to use. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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e85a6196 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply the N25Qxxx specific read configurations The N25Qxxx Serial Flash devices required different sequence configurations depending on whether they're running in 24bit (3Byte) or 32bit (4Byte) mode. We provide those here. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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a37b2f5a |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Provide the default read/write configurations Message sequences can vary depending on how many pads (lines) are required to address the chip (mode & dummy), how many data pads (lines) are required to write out to the chip which will determine speed amongst other things which are detailed by the SFDP specification. We are able to use multiple configurations for each chip, but they need to me matched to a device's capabilities. These configurations are listed in preference order - most preferred first. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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249516c9 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Update the flash Volatile Configuration Register The FSM Serial Flash Controller is driven by issuing a standard set of register writes we call a message sequence. This patch supplies a method to prepare the message sequence responsible for updating a chip's VCR. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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0de08e43 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Provide a method to put the chip into 32bit addressing mode Most Serial Flash chips support 24bit addressing as a default but more recent incarnations can support 32bit. Based on information provided though platform specific data and capabilities we can determine whether or not our current chip can. This patch provides a means to setup the FSM message sequence to put the chip into 32bit mode. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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0ea7d706 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Add a check to if the chip can handle an SoC reset Based on information we can obtain though platform specific data and/or chip capabilities we are able to determine whether or not we can handle a SoC reset or not. To find out why this is important please read the comment provided in the patch. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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88cccb89 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Prepare read/write sequences according to configuration Firstly we search for our preference read/write configuration based on a given chip's capabilities. Then we actually set up the message sequence accordingly. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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6bd29600 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Provide the sequence for enabling 32bit addressing mode The FSM Serial Flash Controller is driven by issuing a standard set of register writes we call a message sequence. This patch supplies a method to prepare the message sequence responsible for setting 32bit addressing mode on the Flash chip. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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fa5ba3af |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Provide the erase one sector sequence The FSM Serial Flash Controller is driven by issuing a standard set of register writes we call a message sequence. This patch supplies a method to prepare the message sequence responsible for erasing a single sector. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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a63984c1 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Fetch boot-device from mode pins It's important for us to determine which device was used to boot from in order to make some correct decisions surrounding Power Management. On each of the platforms which support the FSM this is communicated via a set of mode pins held in the system configuration area. This patch determine the boot device and stores the result. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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97ccf2d2 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Prepare the read/write FSM message sequence(s) The FSM Serial Flash Controller is driven by issuing a standard set of register writes we call a message sequence. This patch supplies a method to prepare read/write FSM message sequence(s) based on chip capability and configuration. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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3b5d1981 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Use device size to determine address width Take some known parameters, namely size and number of sectors and use them to determine weather a device can support 32bit addressing or not. If it can, set the associated flash capability flag for latter use. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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08981274 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Search for preferred FSM message sequence configurations Here we provide a means to traverse though all supplied FSM message sequence configurations and pick one based on our chip's capabilities. The first one we match will be the preferred one, as they are presented in order of preference. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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24fec651 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Dynamically setup flash device based on JEDEC ID Using previously added infrastructure we can now extract a device's JEDEC ID, compare it to a list of known and supported devices and make assumptions based on known characteristics of a given chip. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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11d7f826 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Provide device look-up table Supply a lookup table of all the devices we intend to support. This table is used to store device information such as; a human readable device name, their JEDEC ID (plus the extended version), sector size and amount, a bit store of a device's capabilities, its maximum running frequency and possible use of a per-device configuration call-back. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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5549fbd5 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: devices: Provide header for shared OPCODEs and SFDP commands JEDEC have helped to standardise a great deal of the commands which can be issued to a Serial Flash devices. Many of the Serial Flash Discoverable Parameters (SFDP) commands are generic across devices. This patch provides a shared point where these commands can be defined. Suggested-by: Mark Brown <broonie@kernel.org> Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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1bd512b5 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Add support for JEDEC ID extraction Once we start supporting devices it will be handy go detect them dynamically. This will be done using the chip's unique JEDEC ID. This patch allows us to extract a device's JEDEC ID using the a predefined FSM register write sequence. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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030e82dc |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply a method to read from the FSM's FIFO When invoked the driver will attempt to read any available data from the FSM's data register. Any data collected from this FIFO would have originated from the flash chip. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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3c8b85b3 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply framework for device requests The FSM hardware works by setting a predetermined sequence of register writes. Rather than open coding them inside each functional block we're going to define them in a series of formatted 'sequence structures'. This patch provides the framework which shall be used for every action. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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86f309fd |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Initialise and configure the FSM for normal working conditions This patch uses default values to initialise a connected flash chip. This includes; a device soft reset, setting of a safe working frequency, a switch into Fast Sequencing Mode, configuring of timing data and a purge of the FIFO. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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bc09fb57 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Supply all register address and bit logic defines Here we provide the FSM's register addresses, register bit names/offsets and some commands which will prove useful as we start bulk the FMS's driver out with functionality. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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d90db4a0 |
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20-Mar-2014 |
Lee Jones <lee.jones@linaro.org> |
mtd: st_spi_fsm: Allocate resources and register with MTD framework This is a new driver. It's used to communicate with a special type of optimised Serial Flash Controller called the FSM. The FSM uses a subset of the SPI protocol to communicate with supported NOR-Flash devices. Acked-by Angus Clark <angus.clark@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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