Lines Matching refs:ucr

35 	struct rtsx_ucr	*ucr;
66 struct rtsx_ucr *ucr = host->ucr;
67 rtsx_usb_ep0_write_register(ucr, CARD_STOP,
71 rtsx_usb_clear_dma_err(ucr);
72 rtsx_usb_clear_fsm_err(ucr);
78 struct rtsx_ucr *ucr = host->ucr;
81 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
83 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
85 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
95 struct rtsx_ucr *ucr = host->ucr;
102 rtsx_usb_init_cmd(ucr);
111 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
113 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
115 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
125 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
129 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
131 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
135 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
138 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
140 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
144 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
145 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
146 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
147 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
150 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
157 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
158 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
164 ucr->rsp_buf[0]);
175 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
182 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
191 return rtsx_usb_read_register(ucr,
202 struct rtsx_ucr *ucr = host->ucr;
210 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
220 rtsx_usb_init_cmd(ucr);
225 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
227 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
229 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
231 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
233 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
237 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
238 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
240 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
241 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
243 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
246 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
249 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
251 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
255 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
256 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
257 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
258 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
261 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
268 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
277 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
288 struct rtsx_ucr *ucr = host->ucr;
338 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
345 rtsx_usb_init_cmd(ucr);
347 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
348 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
349 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
350 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
351 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
353 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
354 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
356 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
358 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
365 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
370 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
375 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
377 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
384 err = rtsx_usb_get_rsp(ucr, len, timeout);
385 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
392 ucr->rsp_buf[0]);
408 ptr = ucr->rsp_buf + 1;
451 struct rtsx_ucr *ucr = host->ucr;
474 rtsx_usb_init_cmd(ucr);
476 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
477 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
478 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
480 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
483 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
486 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
488 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
490 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
492 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
496 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
501 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
506 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
507 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
509 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
512 err = rtsx_usb_send_cmd(ucr, flag, 100);
517 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
519 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
521 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
530 return rtsx_usb_get_rsp(ucr, 1, 2000);
535 rtsx_usb_write_register(host->ucr, SD_CFG1,
541 rtsx_usb_write_register(host->ucr, SD_CFG1,
581 struct rtsx_ucr *ucr = host->ucr;
586 rtsx_usb_init_cmd(ucr);
588 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
591 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
594 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
597 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
598 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
600 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
601 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
603 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
656 rtsx_usb_ep0_read_register(host->ucr, SD_DATA_STATE, &val);
749 struct rtsx_ucr *ucr = host->ucr;
756 mutex_lock(&ucr->dev_mutex);
759 err = rtsx_usb_get_card_status(ucr, &val);
761 mutex_unlock(&ucr->dev_mutex);
777 struct rtsx_ucr *ucr = host->ucr;
784 mutex_lock(&ucr->dev_mutex);
787 err = rtsx_usb_get_card_status(ucr, &val);
789 mutex_unlock(&ucr->dev_mutex);
808 struct rtsx_ucr *ucr = host->ucr;
825 mutex_lock(&ucr->dev_mutex);
845 rtsx_usb_write_register(ucr, MC_FIFO_CTL,
860 mutex_unlock(&ucr->dev_mutex);
891 err = rtsx_usb_write_register(host->ucr, SD_CFG1,
897 static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
899 rtsx_usb_init_cmd(ucr);
901 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
902 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
903 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
904 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
905 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
906 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
908 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
911 static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
913 rtsx_usb_init_cmd(ucr);
915 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
916 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
917 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
918 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
919 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
920 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
922 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
925 static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
927 rtsx_usb_init_cmd(ucr);
929 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
930 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
931 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
932 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
933 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
934 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
936 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
939 static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
941 rtsx_usb_init_cmd(ucr);
943 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
944 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
945 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
946 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
947 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
948 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
950 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
955 struct rtsx_ucr *ucr = host->ucr;
959 rtsx_usb_init_cmd(ucr);
960 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
961 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
963 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
965 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
969 if (CHECK_PKG(ucr, LQFP48))
970 err = sd_pull_ctl_enable_lqfp48(ucr);
972 err = sd_pull_ctl_enable_qfn24(ucr);
976 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
983 rtsx_usb_init_cmd(ucr);
984 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
986 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
989 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
994 struct rtsx_ucr *ucr = host->ucr;
998 rtsx_usb_init_cmd(ucr);
1000 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
1001 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
1002 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1004 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1007 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1011 if (CHECK_PKG(ucr, LQFP48))
1012 return sd_pull_ctl_disable_lqfp48(ucr);
1013 return sd_pull_ctl_disable_qfn24(ucr);
1044 struct rtsx_ucr *ucr = host->ucr;
1048 rtsx_usb_init_cmd(ucr);
1053 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1056 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1063 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1066 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1068 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1070 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1077 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1079 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1081 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1083 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1088 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1090 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1092 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1094 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1099 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
1105 struct rtsx_ucr *ucr = host->ucr;
1108 mutex_lock(&ucr->dev_mutex);
1136 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
1139 mutex_unlock(&ucr->dev_mutex);
1146 struct rtsx_ucr *ucr = host->ucr;
1158 mutex_lock(&ucr->dev_mutex);
1160 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
1162 mutex_unlock(&ucr->dev_mutex);
1169 rtsx_usb_init_cmd(ucr);
1172 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1174 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1177 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
1180 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1182 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1186 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1187 mutex_unlock(&ucr->dev_mutex);
1195 struct rtsx_ucr *ucr = host->ucr;
1203 mutex_lock(&ucr->dev_mutex);
1205 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1213 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
1217 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1220 mutex_unlock(&ucr->dev_mutex);
1235 struct rtsx_ucr *ucr = host->ucr;
1241 mutex_lock(&ucr->dev_mutex);
1246 mutex_unlock(&ucr->dev_mutex);
1279 struct rtsx_ucr *ucr = host->ucr;
1282 mutex_lock(&ucr->dev_mutex);
1288 rtsx_usb_turn_off_led(ucr);
1290 rtsx_usb_turn_on_led(ucr);
1293 mutex_unlock(&ucr->dev_mutex);
1328 struct rtsx_ucr *ucr;
1334 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
1335 if (!ucr)
1345 host->ucr = ucr;