pci/mgb4/mgb4_sysfs_out.c

22 	u32 config;
30 		config = mgb4_read_reg(&voutdev->mgbdev->video,
31 				       voutdev->config->regs.config);
32 		if ((config & 0xc) >> 2 == vindev->config->id)
58 	return sprintf(buf, "%d\n", voutdev->config->id);
66 	u32 config = mgb4_read_reg(&voutdev->mgbdev->video,
67 	  voutdev->config->regs.config);
69 	return sprintf(buf, "%u\n", (config & 0xc) >> 2);
94 	u32 config;
114 	config = mgb4_read_reg(&mgbdev->video, voutdev->config->regs.config);
116 	if (((config & 0xc) >> 2) < MGB4_VIN_DEVICES)
117 		loopin_old = mgbdev->vin[(config & 0xc) >> 2];
123 		mgb4_mask_reg(&mgbdev->video, loopin_old->config->regs.config,
126 		mgb4_mask_reg(&mgbdev->video, loopin_new->config->regs.config,
129 	if (val == voutdev->config->id + MGB4_VIN_DEVICES)
130 		mgb4_write_reg(&mgbdev->video, voutdev->config->regs.config,
131 			       config & ~(1 << 1));
133 		mgb4_write_reg(&mgbdev->video, voutdev->config->regs.config,
134 			       config | (1U << 1));
136 	mgb4_mask_reg(&mgbdev->video, voutdev->config->regs.config, 0xc,
151 	u32 config = mgb4_read_reg(&voutdev->mgbdev->video,
152 	  voutdev->config->regs.resolution);
154 	return sprintf(buf, "%u\n", config >> 16);
178 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.resolution,
191 	u32 config = mgb4_read_reg(&voutdev->mgbdev->video,
192 	  voutdev->config->regs.resolution);
194 	return sprintf(buf, "%u\n", config & 0xFFFF);
218 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.resolution,
232 				   voutdev->config->regs.frame_period);
255 		       voutdev->config->regs.frame_period, 125000000 / val);
266 				voutdev->config->regs.hsync);
290 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.hsync,
302 				voutdev->config->regs.vsync);
326 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.vsync,
338 				voutdev->config->regs.hsync);
362 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.hsync,
374 				voutdev->config->regs.vsync);
398 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.vsync,
410 				voutdev->config->regs.hsync);
434 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.hsync,
446 				voutdev->config->regs.vsync);
470 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.vsync,
483 	u32 config = mgb4_read_reg(&voutdev->mgbdev->video,
484 	  voutdev->config->regs.hsync);
486 	return sprintf(buf, "%u\n", (config & (1U << 31)) >> 31);
508 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.hsync,
519 	u32 config = mgb4_read_reg(&voutdev->mgbdev->video,
520 	  voutdev->config->regs.vsync);
522 	return sprintf(buf, "%u\n", (config & (1U << 31)) >> 31);
544 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.vsync,
555 	u32 config = mgb4_read_reg(&voutdev->mgbdev->video,
556 	  voutdev->config->regs.vsync);
558 	return sprintf(buf, "%u\n", (config & (1U << 30)) >> 30);
580 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.vsync,
684 	mgb4_mask_reg(&voutdev->mgbdev->video, voutdev->config->regs.config,