Lines Matching defs:mul
292 struct ccs_pll *pll, u32 mul, u32 div)
308 pll_fr->pll_ip_clk_freq_hz * mul));
311 more_mul *= DIV_ROUND_UP(lim_fr->min_pll_multiplier, mul * more_mul);
314 pll_fr->pll_multiplier = mul * more_mul;
409 u32 mul, div;
413 mul = pre_mul * pll_fr->pre_pll_clk_div / div;
416 dev_dbg(dev, "vt pre-div/mul/div: %u,%u,%u\n",
417 pll_fr->pre_pll_clk_div, mul, div);
420 mul, div);
580 * @mul is the PLL multiplier and @div is the common divisor
582 * multiplier will be a multiple of @mul.
591 struct ccs_pll_branch_bk *op_pll_bk, u32 mul,
599 * are the minimum and maximum multiplier for mul.
612 more_mul_max = op_lim_fr->max_pll_multiplier / mul;
621 op_pll_fr->pre_pll_clk_div * mul));
631 more_mul_max = min(more_mul_max, op_lim_fr->max_pll_multiplier / mul);
638 op_pll_fr->pre_pll_clk_div * mul);
643 DIV_ROUND_UP(op_lim_fr->min_pll_multiplier, mul));
668 op_pll_fr->pll_multiplier = mul * i;
713 u32 mul, div;
807 mul = op_sys_clk_freq_hz_sdr / i;
809 dev_dbg(dev, "mul %u / div %u\n", mul, div);
814 mul /
827 op_pll_fr, op_pll_bk, mul, div,