Lines Matching refs:state
204 int (*init)(struct adv7180_state *state);
232 static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
234 if (state->register_page != page) {
235 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
237 state->register_page = page;
243 static int adv7180_write(struct adv7180_state *state, unsigned int reg,
246 lockdep_assert_held(&state->mutex);
247 adv7180_select_page(state, reg >> 8);
248 return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
251 static int adv7180_read(struct adv7180_state *state, unsigned int reg)
253 lockdep_assert_held(&state->mutex);
254 adv7180_select_page(state, reg >> 8);
255 return i2c_smbus_read_byte_data(state->client, reg & 0xff);
258 static int adv7180_csi_write(struct adv7180_state *state, unsigned int reg,
261 return i2c_smbus_write_byte_data(state->csi_client, reg, value);
264 static int adv7180_set_video_standard(struct adv7180_state *state,
267 return state->chip_info->set_std(state, std);
270 static int adv7180_vpp_write(struct adv7180_state *state, unsigned int reg,
273 return i2c_smbus_write_byte_data(state->vpp_client, reg, value);
335 static int __adv7180_status(struct adv7180_state *state, u32 *status,
338 int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
358 struct adv7180_state *state = to_state(sd);
359 int err = mutex_lock_interruptible(&state->mutex);
363 if (state->streaming) {
368 err = adv7180_set_video_standard(state,
374 __adv7180_status(state, NULL, std);
376 err = v4l2_std_to_adv7180(state->curr_norm);
380 err = adv7180_set_video_standard(state, err);
383 mutex_unlock(&state->mutex);
390 struct adv7180_state *state = to_state(sd);
391 int ret = mutex_lock_interruptible(&state->mutex);
396 if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) {
401 ret = state->chip_info->select_input(state, input);
404 state->input = input;
406 mutex_unlock(&state->mutex);
412 struct adv7180_state *state = to_state(sd);
413 int ret = mutex_lock_interruptible(&state->mutex);
417 ret = __adv7180_status(state, status, NULL);
418 mutex_unlock(&state->mutex);
422 static int adv7180_program_std(struct adv7180_state *state)
426 ret = v4l2_std_to_adv7180(state->curr_norm);
430 ret = adv7180_set_video_standard(state, ret);
438 struct adv7180_state *state = to_state(sd);
439 int ret = mutex_lock_interruptible(&state->mutex);
449 state->curr_norm = std;
451 ret = adv7180_program_std(state);
453 mutex_unlock(&state->mutex);
459 struct adv7180_state *state = to_state(sd);
461 *norm = state->curr_norm;
470 struct adv7180_state *state = to_state(sd);
474 * subdev active state API.
479 if (state->curr_norm & V4L2_STD_525_60) {
490 static void adv7180_set_power_pin(struct adv7180_state *state, bool on)
492 if (!state->pwdn_gpio)
496 gpiod_set_value_cansleep(state->pwdn_gpio, 0);
499 gpiod_set_value_cansleep(state->pwdn_gpio, 1);
503 static void adv7180_set_reset_pin(struct adv7180_state *state, bool on)
505 if (!state->rst_gpio)
509 gpiod_set_value_cansleep(state->rst_gpio, 1);
511 gpiod_set_value_cansleep(state->rst_gpio, 0);
516 static int adv7180_set_power(struct adv7180_state *state, bool on)
526 ret = adv7180_write(state, ADV7180_REG_PWR_MAN, val);
530 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
532 adv7180_csi_write(state, 0xDE, 0x02);
533 adv7180_csi_write(state, 0xD2, 0xF7);
534 adv7180_csi_write(state, 0xD8, 0x65);
535 adv7180_csi_write(state, 0xE0, 0x09);
536 adv7180_csi_write(state, 0x2C, 0x00);
537 if (state->field == V4L2_FIELD_NONE)
538 adv7180_csi_write(state, 0x1D, 0x80);
539 adv7180_csi_write(state, 0x00, 0x00);
541 adv7180_csi_write(state, 0x00, 0x80);
550 struct adv7180_state *state = to_state(sd);
553 ret = mutex_lock_interruptible(&state->mutex);
557 ret = adv7180_set_power(state, on);
559 state->powered = on;
561 mutex_unlock(&state->mutex);
573 static int adv7180_test_pattern(struct adv7180_state *state, int value)
583 adv7180_write(state, ADV7180_REG_ANALOG_CLAMP_CTL, reg);
586 reg = adv7180_read(state, ADV7180_REG_DEF_VALUE_Y);
588 adv7180_write(state, ADV7180_REG_DEF_VALUE_Y, reg);
592 reg = adv7180_read(state, ADV7180_REG_DEF_VALUE_Y);
594 adv7180_write(state, ADV7180_REG_DEF_VALUE_Y, reg);
602 struct adv7180_state *state = to_state(sd);
603 int ret = mutex_lock_interruptible(&state->mutex);
611 ret = adv7180_write(state, ADV7180_REG_BRI, val);
615 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
618 ret = adv7180_write(state, ADV7180_REG_CON, val);
625 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
628 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
633 adv7180_write(state, 0x80d9, 0x44);
634 adv7180_write(state, ADV7180_REG_FLCONTROL,
638 adv7180_write(state, 0x80d9, 0xc4);
639 adv7180_write(state, ADV7180_REG_FLCONTROL, 0x00);
643 ret = adv7180_test_pattern(state, val);
649 mutex_unlock(&state->mutex);
667 static int adv7180_init_controls(struct adv7180_state *state)
669 v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
671 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
674 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
677 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
680 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
683 v4l2_ctrl_new_custom(&state->ctrl_hdl, &adv7180_ctrl_fast_switch, NULL);
685 v4l2_ctrl_new_std_menu_items(&state->ctrl_hdl, &adv7180_ctrl_ops,
691 state->sd.ctrl_handler = &state->ctrl_hdl;
692 if (state->ctrl_hdl.error) {
693 int err = state->ctrl_hdl.error;
695 v4l2_ctrl_handler_free(&state->ctrl_hdl);
698 v4l2_ctrl_handler_setup(&state->ctrl_hdl);
702 static void adv7180_exit_controls(struct adv7180_state *state)
704 v4l2_ctrl_handler_free(&state->ctrl_hdl);
722 struct adv7180_state *state = to_state(sd);
727 fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
729 if (state->field == V4L2_FIELD_ALTERNATE)
735 static int adv7180_set_field_mode(struct adv7180_state *state)
737 if (!(state->chip_info->flags & ADV7180_FLAG_I2P))
740 if (state->field == V4L2_FIELD_NONE) {
741 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
742 adv7180_csi_write(state, 0x01, 0x20);
743 adv7180_csi_write(state, 0x02, 0x28);
744 adv7180_csi_write(state, 0x03, 0x38);
745 adv7180_csi_write(state, 0x04, 0x30);
746 adv7180_csi_write(state, 0x05, 0x30);
747 adv7180_csi_write(state, 0x06, 0x80);
748 adv7180_csi_write(state, 0x07, 0x70);
749 adv7180_csi_write(state, 0x08, 0x50);
751 adv7180_vpp_write(state, 0xa3, 0x00);
752 adv7180_vpp_write(state, 0x5b, 0x00);
753 adv7180_vpp_write(state, 0x55, 0x80);
755 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
756 adv7180_csi_write(state, 0x01, 0x18);
757 adv7180_csi_write(state, 0x02, 0x18);
758 adv7180_csi_write(state, 0x03, 0x30);
759 adv7180_csi_write(state, 0x04, 0x20);
760 adv7180_csi_write(state, 0x05, 0x28);
761 adv7180_csi_write(state, 0x06, 0x40);
762 adv7180_csi_write(state, 0x07, 0x58);
763 adv7180_csi_write(state, 0x08, 0x30);
765 adv7180_vpp_write(state, 0xa3, 0x70);
766 adv7180_vpp_write(state, 0x5b, 0x80);
767 adv7180_vpp_write(state, 0x55, 0x00);
777 struct adv7180_state *state = to_state(sd);
783 format->format.field = state->field;
793 struct adv7180_state *state = to_state(sd);
799 if (state->chip_info->flags & ADV7180_FLAG_I2P)
810 if (state->field != format->format.field) {
811 state->field = format->format.field;
812 adv7180_set_power(state, false);
813 adv7180_set_field_mode(state);
814 adv7180_set_power(state, true);
839 struct adv7180_state *state = to_state(sd);
841 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
868 struct adv7180_state *state = to_state(sd);
870 if (state->curr_norm & V4L2_STD_525_60) {
889 struct adv7180_state *state = to_state(sd);
894 state->streaming = enable;
899 ret = mutex_lock_interruptible(&state->mutex);
902 state->streaming = enable;
903 mutex_unlock(&state->mutex);
963 struct adv7180_state *state = devid;
966 mutex_lock(&state->mutex);
967 isr3 = adv7180_read(state, ADV7180_REG_ISR3);
969 adv7180_write(state, ADV7180_REG_ICR3, isr3);
977 v4l2_subdev_notify_event(&state->sd, &src_ch);
979 mutex_unlock(&state->mutex);
984 static int adv7180_init(struct adv7180_state *state)
989 ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
995 return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
999 static int adv7180_set_std(struct adv7180_state *state, unsigned int std)
1001 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
1002 (std << 4) | state->input);
1005 static int adv7180_select_input(struct adv7180_state *state, unsigned int input)
1009 ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
1015 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret);
1018 static int adv7182_init(struct adv7180_state *state)
1020 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2)
1021 adv7180_write(state, ADV7180_REG_CSI_SLAVE_ADDR,
1024 if (state->chip_info->flags & ADV7180_FLAG_I2P)
1025 adv7180_write(state, ADV7180_REG_VPP_SLAVE_ADDR,
1028 if (state->chip_info->flags & ADV7180_FLAG_V2) {
1030 adv7180_write(state, 0x0080, 0x51);
1031 adv7180_write(state, 0x0081, 0x51);
1032 adv7180_write(state, 0x0082, 0x68);
1036 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
1037 adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x4e);
1038 adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL, 0x57);
1039 adv7180_write(state, ADV7180_REG_CTRL_2, 0xc0);
1041 if (state->chip_info->flags & ADV7180_FLAG_V2) {
1042 if (state->force_bt656_4) {
1044 adv7180_write(state,
1048 adv7180_write(state,
1052 adv7180_write(state,
1056 adv7180_write(state,
1061 adv7180_write(state,
1065 adv7180_write(state, ADV7180_REG_OUTPUT_CONTROL, 0x0c);
1066 adv7180_write(state, ADV7180_REG_CTRL_2, 0x40);
1069 adv7180_write(state, 0x0013, 0x00);
1074 static int adv7182_set_std(struct adv7180_state *state, unsigned int std)
1077 return adv7180_write(state, ADV7182_REG_INPUT_VIDSEL,
1133 static int adv7182_select_input(struct adv7180_state *state, unsigned int input)
1140 ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, input);
1145 adv7180_write(state, ADV7180_REG_RST_CLAMP, 0x00);
1146 adv7180_write(state, ADV7180_REG_RST_CLAMP, 0xff);
1154 adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x41);
1157 adv7180_write(state, ADV7180_REG_SHAP_FILTER_CTL_1, 0x01);
1161 if (state->chip_info->flags & ADV7180_FLAG_V2)
1167 adv7180_write(state, ADV7180_REG_CVBS_TRIM + i, lbias[i]);
1171 adv7180_write(state, ADV7180_REG_RES_CIR, 0xa8);
1172 adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0x90);
1173 adv7180_write(state, ADV7180_REG_DIFF_MODE, 0xb0);
1174 adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x08);
1175 adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0xa0);
1177 adv7180_write(state, ADV7180_REG_RES_CIR, 0xf0);
1178 adv7180_write(state, ADV7180_REG_CLAMP_ADJ, 0xd0);
1179 adv7180_write(state, ADV7180_REG_DIFF_MODE, 0x10);
1180 adv7180_write(state, ADV7180_REG_AGC_ADJ1, 0x9c);
1181 adv7180_write(state, ADV7180_REG_AGC_ADJ2, 0x00);
1352 static int init_device(struct adv7180_state *state)
1356 mutex_lock(&state->mutex);
1358 adv7180_set_power_pin(state, true);
1359 adv7180_set_reset_pin(state, false);
1361 adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
1364 ret = state->chip_info->init(state);
1368 ret = adv7180_program_std(state);
1372 adv7180_set_field_mode(state);
1375 if (state->irq > 0) {
1377 ret = adv7180_write(state, ADV7180_REG_ICONF1,
1383 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
1387 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
1392 ret = adv7180_write(state, ADV7180_REG_IMR3,
1397 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
1403 mutex_unlock(&state->mutex);
1411 struct adv7180_state *state;
1419 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
1420 if (state == NULL)
1423 state->client = client;
1424 state->field = V4L2_FIELD_ALTERNATE;
1425 state->chip_info = i2c_get_match_data(client);
1427 state->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown",
1429 if (IS_ERR(state->pwdn_gpio)) {
1430 ret = PTR_ERR(state->pwdn_gpio);
1435 state->rst_gpio = devm_gpiod_get_optional(&client->dev, "reset",
1437 if (IS_ERR(state->rst_gpio)) {
1438 ret = PTR_ERR(state->rst_gpio);
1444 state->force_bt656_4 = true;
1446 if (state->chip_info->flags & ADV7180_FLAG_MIPI_CSI2) {
1447 state->csi_client = i2c_new_dummy_device(client->adapter,
1449 if (IS_ERR(state->csi_client))
1450 return PTR_ERR(state->csi_client);
1453 if (state->chip_info->flags & ADV7180_FLAG_I2P) {
1454 state->vpp_client = i2c_new_dummy_device(client->adapter,
1456 if (IS_ERR(state->vpp_client)) {
1457 ret = PTR_ERR(state->vpp_client);
1462 state->irq = client->irq;
1463 mutex_init(&state->mutex);
1464 state->curr_norm = V4L2_STD_NTSC;
1465 if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED)
1466 state->powered = true;
1468 state->powered = false;
1469 state->input = 0;
1470 sd = &state->sd;
1475 ret = adv7180_init_controls(state);
1479 state->pad.flags = MEDIA_PAD_FL_SOURCE;
1481 ret = media_entity_pads_init(&sd->entity, 1, &state->pad);
1485 ret = init_device(state);
1489 if (state->irq > 0) {
1492 KBUILD_MODNAME, state);
1501 mutex_lock(&state->mutex);
1502 ret = adv7180_read(state, ADV7180_REG_IDENT);
1503 mutex_unlock(&state->mutex);
1515 if (state->irq > 0)
1516 free_irq(client->irq, state);
1520 adv7180_exit_controls(state);
1522 i2c_unregister_device(state->vpp_client);
1524 i2c_unregister_device(state->csi_client);
1525 mutex_destroy(&state->mutex);
1532 struct adv7180_state *state = to_state(sd);
1536 if (state->irq > 0)
1537 free_irq(client->irq, state);
1540 adv7180_exit_controls(state);
1542 i2c_unregister_device(state->vpp_client);
1543 i2c_unregister_device(state->csi_client);
1545 adv7180_set_reset_pin(state, true);
1546 adv7180_set_power_pin(state, false);
1548 mutex_destroy(&state->mutex);
1555 struct adv7180_state *state = to_state(sd);
1557 return adv7180_set_power(state, false);
1563 struct adv7180_state *state = to_state(sd);
1566 ret = init_device(state);
1570 ret = adv7180_set_power(state, state->powered);