Lines Matching refs:icode
5529 is_ax(dd) && (dd->icode != ICODE_FUNCTIONAL_SIMULATOR)) {
5817 (dd->icode != ICODE_FUNCTIONAL_SIMULATOR))
6575 if (dd->icode != ICODE_FPGA_EMULATION)
6993 if (!(quick_linkup || dd->icode == ICODE_FUNCTIONAL_SIMULATOR))
7275 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR || quick_linkup)
7333 if ((dd->icode == ICODE_RTL_SILICON) &&
8576 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR) {
8670 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR ||
9210 if (loopback && dd->icode == ICODE_FUNCTIONAL_SIMULATOR) {
9279 if ((dd->icode == ICODE_FUNCTIONAL_SIMULATOR) &&
9298 if (dd->icode == ICODE_FPGA_EMULATION) {
9756 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR)
10709 (quick_linkup || dd->icode == ICODE_FUNCTIONAL_SIMULATOR)) {
10791 if (dd->icode == ICODE_FUNCTIONAL_SIMULATOR)
11770 if (dd->icode == ICODE_FPGA_EMULATION)
11787 if (dd->icode == ICODE_FPGA_EMULATION)
13152 if (dd->icode != ICODE_RTL_SILICON) {
14762 if (dd->icode != ICODE_FUNCTIONAL_SIMULATOR)
15099 dd->icode = reg >> CCE_REVISION2_IMPL_CODE_SHIFT;
15102 dd->icode < ARRAY_SIZE(inames) ?
15103 inames[dd->icode] : "unknown", (int)dd->irev);
15114 if (dd->icode == ICODE_FPGA_EMULATION && is_emulator_p(dd)) {
15135 * Must be after icode is set up - the cclock rate depends
15403 if (dd->icode != ICODE_RTL_SILICON ||