hw/hfi1/chip.c

1076 	void (*handler)(struct hfi1_devdata *dd, u32 source, u64 reg);
1088 #define EE(reg, handler, desc) \
1090 		handler, desc }
1091 #define DC_EE1(reg, handler, desc) \
1092 	{ reg##_FLG, reg##_FLG_CLR, reg##_FLG_EN, handler, desc }
1093 #define DC_EE2(reg, handler, desc) \
1094 	{ reg##_FLG, reg##_CLR, reg##_EN, handler, desc }
5696 		 * attribute them to the packet that triggered this handler.
5878  * If the handler loops too many times, assume that something is wrong
5895 		if (likely(eri->handler))
5896 			eri->handler(dd, context, reg);
5922 	if (eri->handler) {
6058 	 * because it is not a second tier interrupt. The handler
6063 	else if (eri->handler)
6772 	/* queue non-interrupt handler */
6990 	 * handle_linkup_change. VerifyCap interrupt handler will not be
8102 	if (eri->handler) {
8159  * is_rcv_avail_int() - User receive context available IRQ handler
8165  * This is the general interrupt handler for user (PSM) receive contexts,
8191  * is_rcv_urgent_int() - User receive context urgent IRQ handler
8280  * general_interrupt -  General interrupt handler
8285  * context DATA IRQs are threaded and are not supported by this handler.
8311 	/* phase 2: call the appropriate handler */
8470 /* Receive packet napi handler for netdevs VNIC and AIP  */
8483 		WARN_ONCE(1, "Napi IRQ handler without napi set up ctxt=%d\n",
8492  * Receive packet IRQ handler.  This routine expects to be on its own IRQ.
8494  * it finds too many, it will invoke the thread handler (bandwitdh).  The
8511 	 * IRQ handler.  Invoke the handler thread.  The receive interrupt
8522  * Receive packet thread handler.  This expects to be invoked with the
8529 	/* receive interrupt is still blocked from the IRQ handler */
13263  * Remap the interrupt source from the general handler to the given MSI-X
13305  * Set the general handler to accept all interrupts, remap all
13312 	/* all interrupts handled by the general handler */
13336 	/* reset general handler mask, chip MSI-X mappings */