Lines Matching refs:st
277 static int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val)
279 st->tx[0] = SCA3000_WRITE_REG(address);
280 st->tx[1] = val;
281 return spi_write(st->us, st->tx, 2);
284 static int sca3000_read_data_short(struct sca3000_state *st,
291 .tx_buf = st->tx,
294 .rx_buf = st->rx,
297 st->tx[0] = SCA3000_READ_REG(reg_address_high);
299 return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
304 * @st: Driver specific device instance data.
308 static int sca3000_reg_lock_on(struct sca3000_state *st)
312 ret = sca3000_read_data_short(st, SCA3000_REG_STATUS_ADDR, 1);
316 return !(st->rx[0] & SCA3000_LOCKED);
321 * @st: Driver specific device instance data.
327 static int __sca3000_unlock_reg_lock(struct sca3000_state *st)
333 .tx_buf = st->tx,
337 .tx_buf = st->tx + 2,
340 .tx_buf = st->tx + 4,
343 st->tx[0] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
344 st->tx[1] = 0x00;
345 st->tx[2] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
346 st->tx[3] = 0x50;
347 st->tx[4] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR);
348 st->tx[5] = 0xA0;
350 return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
355 * @st: Driver specific device instance data.
364 static int sca3000_write_ctrl_reg(struct sca3000_state *st,
370 ret = sca3000_reg_lock_on(st);
374 ret = __sca3000_unlock_reg_lock(st);
380 ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, sel);
385 ret = sca3000_write_reg(st, SCA3000_REG_CTRL_DATA_ADDR, val);
393 * @st: Driver specific device instance data.
398 static int sca3000_read_ctrl_reg(struct sca3000_state *st,
403 ret = sca3000_reg_lock_on(st);
407 ret = __sca3000_unlock_reg_lock(st);
412 ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, ctrl_reg);
415 ret = sca3000_read_data_short(st, SCA3000_REG_CTRL_DATA_ADDR, 1);
418 return st->rx[0];
432 struct sca3000_state *st = iio_priv(indio_dev);
434 mutex_lock(&st->lock);
435 ret = sca3000_read_data_short(st, SCA3000_REG_REVID_ADDR, 1);
440 st->rx[0] & SCA3000_REG_REVID_MAJOR_MASK,
441 st->rx[0] & SCA3000_REG_REVID_MINOR_MASK);
443 mutex_unlock(&st->lock);
454 struct sca3000_state *st = iio_priv(indio_dev);
457 len = sprintf(buf, "%d", st->info->measurement_mode_3db_freq);
458 if (st->info->option_mode_1)
460 st->info->option_mode_1_3db_freq);
461 if (st->info->option_mode_2)
463 st->info->option_mode_2_3db_freq);
566 * @st: Private driver specific device instance specific state.
572 static inline int __sca3000_get_base_freq(struct sca3000_state *st,
578 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
581 switch (SCA3000_REG_MODE_MODE_MASK & st->rx[0]) {
600 * @st: Private driver specific device instance specific state.
605 static int sca3000_read_raw_samp_freq(struct sca3000_state *st, int *val)
609 ret = __sca3000_get_base_freq(st, st->info, val);
613 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
634 * @st: Private driver specific device instance specific state.
639 static int sca3000_write_raw_samp_freq(struct sca3000_state *st, int val)
643 ret = __sca3000_get_base_freq(st, st->info, &base_freq);
647 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
660 return sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
664 static int sca3000_read_3db_freq(struct sca3000_state *st, int *val)
668 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
673 st->rx[0] &= SCA3000_REG_MODE_MODE_MASK;
674 switch (st->rx[0]) {
676 *val = st->info->measurement_mode_3db_freq;
681 *val = st->info->option_mode_1_3db_freq;
684 *val = st->info->option_mode_2_3db_freq;
691 static int sca3000_write_3db_freq(struct sca3000_state *st, int val)
696 if (val == st->info->measurement_mode_3db_freq)
698 else if (st->info->option_mode_1 &&
699 (val == st->info->option_mode_1_3db_freq))
701 else if (st->info->option_mode_2 &&
702 (val == st->info->option_mode_2_3db_freq))
706 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
710 st->rx[0] &= ~SCA3000_REG_MODE_MODE_MASK;
711 st->rx[0] |= (mode & SCA3000_REG_MODE_MODE_MASK);
713 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, st->rx[0]);
722 struct sca3000_state *st = iio_priv(indio_dev);
728 mutex_lock(&st->lock);
730 if (st->mo_det_use_count) {
731 mutex_unlock(&st->lock);
735 ret = sca3000_read_data_short(st, address, 2);
737 mutex_unlock(&st->lock);
740 *val = sign_extend32(be16_to_cpup((__be16 *)st->rx) >>
745 ret = sca3000_read_data_short(st,
749 mutex_unlock(&st->lock);
752 *val = (be16_to_cpup((__be16 *)st->rx) >>
756 mutex_unlock(&st->lock);
761 *val2 = st->info->scale;
770 mutex_lock(&st->lock);
771 ret = sca3000_read_raw_samp_freq(st, val);
772 mutex_unlock(&st->lock);
775 mutex_lock(&st->lock);
776 ret = sca3000_read_3db_freq(st, val);
777 mutex_unlock(&st->lock);
788 struct sca3000_state *st = iio_priv(indio_dev);
795 mutex_lock(&st->lock);
796 ret = sca3000_write_raw_samp_freq(st, val);
797 mutex_unlock(&st->lock);
802 mutex_lock(&st->lock);
803 ret = sca3000_write_3db_freq(st, val);
804 mutex_unlock(&st->lock);
829 struct sca3000_state *st = iio_priv(indio_dev);
832 mutex_lock(&st->lock);
833 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
834 val = st->rx[0];
835 mutex_unlock(&st->lock);
842 st->info->measurement_mode_freq,
843 st->info->measurement_mode_freq / 2,
844 st->info->measurement_mode_freq / 4);
848 st->info->option_mode_1_freq,
849 st->info->option_mode_1_freq / 2,
850 st->info->option_mode_1_freq / 4);
854 st->info->option_mode_2_freq,
855 st->info->option_mode_2_freq / 2,
856 st->info->option_mode_2_freq / 4);
880 struct sca3000_state *st = iio_priv(indio_dev);
886 mutex_lock(&st->lock);
887 ret = sca3000_read_ctrl_reg(st,
889 mutex_unlock(&st->lock);
895 ARRAY_SIZE(st->info->mot_det_mult_y))
896 *val += st->info->mot_det_mult_y[i];
899 ARRAY_SIZE(st->info->mot_det_mult_xz))
900 *val += st->info->mot_det_mult_xz[i];
932 struct sca3000_state *st = iio_priv(indio_dev);
938 i = ARRAY_SIZE(st->info->mot_det_mult_y);
940 if (val >= st->info->mot_det_mult_y[--i]) {
942 val -= st->info->mot_det_mult_y[i];
945 i = ARRAY_SIZE(st->info->mot_det_mult_xz);
947 if (val >= st->info->mot_det_mult_xz[--i]) {
949 val -= st->info->mot_det_mult_xz[i];
953 mutex_lock(&st->lock);
954 ret = sca3000_write_ctrl_reg(st,
957 mutex_unlock(&st->lock);
972 static int sca3000_read_data(struct sca3000_state *st,
981 .tx_buf = st->tx,
988 st->tx[0] = SCA3000_READ_REG(reg_address_high);
989 ret = spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer));
991 dev_err(&st->us->dev, "problem reading register\n");
1005 struct sca3000_state *st = iio_priv(indio_dev);
1008 mutex_lock(&st->lock);
1011 ret = sca3000_read_data_short(st, SCA3000_REG_BUF_COUNT_ADDR,
1015 num_available = st->rx[0];
1020 ret = sca3000_read_data(st, SCA3000_REG_RING_OUT_ADDR, st->rx,
1032 iio_push_to_buffers(indio_dev, st->rx + i * 3 * 2);
1036 mutex_unlock(&st->lock);
1054 struct sca3000_state *st = iio_priv(indio_dev);
1062 mutex_lock(&st->lock);
1063 ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1);
1064 val = st->rx[0];
1065 mutex_unlock(&st->lock);
1119 struct sca3000_state *st = iio_priv(indio_dev);
1122 mutex_lock(&st->lock);
1124 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1130 ret = !!(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT);
1139 if ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1143 ret = sca3000_read_ctrl_reg(st,
1156 mutex_unlock(&st->lock);
1163 struct sca3000_state *st = iio_priv(indio_dev);
1167 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1172 if (state && !(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT))
1173 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1174 st->rx[0] | SCA3000_REG_MODE_FREE_FALL_DETECT);
1176 else if (!state && (st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT))
1177 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1178 st->rx[0] & ~SCA3000_REG_MODE_FREE_FALL_DETECT);
1186 struct sca3000_state *st = iio_priv(indio_dev);
1193 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
1199 ret = sca3000_write_ctrl_reg(st,
1205 st->mo_det_use_count++;
1207 ret = sca3000_write_ctrl_reg(st,
1213 st->mo_det_use_count--;
1217 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1221 if ((st->mo_det_use_count) &&
1222 ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1224 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1225 (st->rx[0] & ~SCA3000_REG_MODE_MODE_MASK)
1228 else if (!(st->mo_det_use_count) &&
1229 ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK)
1231 return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1232 st->rx[0] & SCA3000_REG_MODE_MODE_MASK);
1258 struct sca3000_state *st = iio_priv(indio_dev);
1261 mutex_lock(&st->lock);
1278 mutex_unlock(&st->lock);
1286 struct sca3000_state *st = iio_priv(indio_dev);
1289 mutex_lock(&st->lock);
1290 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1295 ret = sca3000_write_reg(st,
1297 (st->rx[0] | SCA3000_REG_MODE_RING_BUF_ENABLE));
1299 ret = sca3000_write_reg(st,
1301 (st->rx[0] & ~SCA3000_REG_MODE_RING_BUF_ENABLE));
1303 mutex_unlock(&st->lock);
1320 struct sca3000_state *st = iio_priv(indio_dev);
1322 mutex_lock(&st->lock);
1325 ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1328 ret = sca3000_write_reg(st,
1330 st->rx[0] | SCA3000_REG_INT_MASK_RING_HALF);
1334 mutex_unlock(&st->lock);
1339 mutex_unlock(&st->lock);
1347 struct sca3000_state *st = iio_priv(indio_dev);
1354 mutex_lock(&st->lock);
1356 ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1359 ret = sca3000_write_reg(st,
1361 st->rx[0] & ~SCA3000_REG_INT_MASK_RING_HALF);
1363 mutex_unlock(&st->lock);
1374 * @st: Device instance specific private data structure
1380 static int sca3000_clean_setup(struct sca3000_state *st)
1384 mutex_lock(&st->lock);
1386 ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1);
1391 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL);
1394 ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL,
1400 ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL);
1403 ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL,
1412 ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1415 ret = sca3000_write_reg(st,
1426 ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1);
1429 ret = sca3000_write_reg(st, SCA3000_REG_MODE_ADDR,
1430 (st->rx[0] & SCA3000_MODE_PROT_MASK));
1433 mutex_unlock(&st->lock);
1450 struct sca3000_state *st;
1453 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1457 st = iio_priv(indio_dev);
1459 st->us = spi;
1460 mutex_init(&st->lock);
1461 st->info = &sca3000_spi_chip_info_tbl[spi_get_device_id(spi)
1466 if (st->info->temp_output) {
1491 ret = sca3000_clean_setup(st);
1508 static int sca3000_stop_all_interrupts(struct sca3000_state *st)
1512 mutex_lock(&st->lock);
1513 ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1);
1516 ret = sca3000_write_reg(st, SCA3000_REG_INT_MASK_ADDR,
1517 (st->rx[0] &
1522 mutex_unlock(&st->lock);
1529 struct sca3000_state *st = iio_priv(indio_dev);
1534 sca3000_stop_all_interrupts(st);