i2c/busses/i2c-synquacer.c

12 #include <linux/i2c.h>
149 static inline int is_lastmsg(struct synquacer_i2c *i2c)
151 	return i2c->msg_idx >= (i2c->msg_num - 1);
154 static inline int is_msglast(struct synquacer_i2c *i2c)
156 	return i2c->msg_ptr == (i2c->msg->len - 1);
159 static inline int is_msgend(struct synquacer_i2c *i2c)
161 	return i2c->msg_ptr >= i2c->msg->len;
164 static inline unsigned long calc_timeout_ms(struct synquacer_i2c *i2c,
177 static void synquacer_i2c_stop(struct synquacer_i2c *i2c, int ret)
184 	writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR);
186 	i2c->state = STATE_IDLE;
188 	i2c->msg_ptr = 0;
189 	i2c->msg = NULL;
190 	i2c->msg_idx++;
191 	i2c->msg_num = 0;
193 		i2c->msg_idx = ret;
195 	complete(&i2c->completion);
198 static void synquacer_i2c_hw_init(struct synquacer_i2c *i2c)
201 	u32 rt = i2c->pclkrate;
204 	writeb(0, i2c->base + SYNQUACER_I2C_REG_ADR);
207 	writeb(SYNQUACER_I2C_BUS_CLK_FR(i2c->pclkrate),
208 	       i2c->base + SYNQUACER_I2C_REG_FSR);
210 	switch (i2c->speed_khz) {
212 		if (i2c->pclkrate <= SYNQUACER_I2C_CLK_RATE_18M) {
223 		       i2c->base + SYNQUACER_I2C_REG_CCR);
224 		writeb(csr_cs, i2c->base + SYNQUACER_I2C_REG_CSR);
227 		if (i2c->pclkrate <= SYNQUACER_I2C_CLK_RATE_18M) {
237 		      i2c->base + SYNQUACER_I2C_REG_CCR);
238 		writeb(csr_cs, i2c->base + SYNQUACER_I2C_REG_CSR);
245 	writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR);
246 	writeb(0, i2c->base + SYNQUACER_I2C_REG_BC2R);
249 static void synquacer_i2c_hw_reset(struct synquacer_i2c *i2c)
252 	writeb(0, i2c->base + SYNQUACER_I2C_REG_CCR);
253 	writeb(0, i2c->base + SYNQUACER_I2C_REG_CSR);
255 	WAIT_PCLK(100, i2c->pclkrate);
258 static int synquacer_i2c_master_start(struct synquacer_i2c *i2c,
263 	writeb(i2c_8bit_addr_from_msg(pmsg), i2c->base + SYNQUACER_I2C_REG_DAR);
265 	dev_dbg(i2c->dev, "slave:0x%02x\n", pmsg->addr);
268 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
269 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);
270 	dev_dbg(i2c->dev, "bsr:0x%02x, bcr:0x%02x\n", bsr, bcr);
274 		dev_dbg(i2c->dev, "bus is busy");
279 		dev_dbg(i2c->dev, "Continuous Start");
281 		       i2c->base + SYNQUACER_I2C_REG_BCR);
284 			dev_dbg(i2c->dev, "not in master mode");
287 		dev_dbg(i2c->dev, "Start Condition");
291 		       i2c->base + SYNQUACER_I2C_REG_BCR);
294 	WAIT_PCLK(10, i2c->pclkrate);
297 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
298 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);
299 	dev_dbg(i2c->dev, "bsr:0x%02x, bcr:0x%02x\n", bsr, bcr);
303 		dev_dbg(i2c->dev, "arbitration lost\n");
310 static int synquacer_i2c_doxfer(struct synquacer_i2c *i2c,
317 	synquacer_i2c_hw_init(i2c);
318 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
320 		dev_err(i2c->dev, "cannot get bus (bus busy)\n");
324 	reinit_completion(&i2c->completion);
326 	i2c->msg = msgs;
327 	i2c->msg_num = num;
328 	i2c->msg_ptr = 0;
329 	i2c->msg_idx = 0;
330 	i2c->state = STATE_START;
332 	ret = synquacer_i2c_master_start(i2c, i2c->msg);
334 		dev_dbg(i2c->dev, "Address failed: (%d)\n", ret);
338 	timeout = wait_for_completion_timeout(&i2c->completion,
339 					msecs_to_jiffies(i2c->timeout_ms));
341 		dev_dbg(i2c->dev, "timeout\n");
345 	ret = i2c->msg_idx;
347 		dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
352 	udelay(DIV_ROUND_UP(2 * 1000, i2c->speed_khz));
359 	struct synquacer_i2c *i2c = dev_id;
365 	bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR);
366 	bsr = readb(i2c->base + SYNQUACER_I2C_REG_BSR);
367 	dev_dbg(i2c->dev, "bsr:0x%02x, bcr:0x%02x\n", bsr, bcr);
370 		dev_err(i2c->dev, "bus error\n");
371 		synquacer_i2c_stop(i2c, -EAGAIN);
376 		dev_dbg(i2c->dev, "arbitration lost\n");
377 		synquacer_i2c_stop(i2c, -EAGAIN);
381 	switch (i2c->state) {
384 			dev_dbg(i2c->dev, "ack was not received\n");
385 			synquacer_i2c_stop(i2c, -EAGAIN);
389 		if (i2c->msg->flags & I2C_M_RD)
390 			i2c->state = STATE_READ;
392 			i2c->state = STATE_WRITE;
394 		if (is_lastmsg(i2c) && i2c->msg->len == 0) {
395 			synquacer_i2c_stop(i2c, 0);
399 		if (i2c->state == STATE_READ)
405 			dev_dbg(i2c->dev, "WRITE: No Ack\n");
406 			synquacer_i2c_stop(i2c, -EAGAIN);
410 		if (!is_msgend(i2c)) {
411 			writeb(i2c->msg->buf[i2c->msg_ptr++],
412 			       i2c->base + SYNQUACER_I2C_REG_DAR);
418 			       i2c->base + SYNQUACER_I2C_REG_BCR);
421 		if (is_lastmsg(i2c)) {
422 			synquacer_i2c_stop(i2c, 0);
425 		dev_dbg(i2c->dev, "WRITE: Next Message\n");
427 		i2c->msg_ptr = 0;
428 		i2c->msg_idx++;
429 		i2c->msg++;
432 		ret = synquacer_i2c_master_start(i2c, i2c->msg);
434 			dev_dbg(i2c->dev, "restart error (%d)\n", ret);
435 			synquacer_i2c_stop(i2c, -EAGAIN);
438 		i2c->state = STATE_START;
442 		byte = readb(i2c->base + SYNQUACER_I2C_REG_DAR);
444 			i2c->msg->buf[i2c->msg_ptr++] = byte;
446 			dev_dbg(i2c->dev, "address:0x%02x. ignore it.\n", byte);
449 		if (is_msglast(i2c)) {
453 			       i2c->base + SYNQUACER_I2C_REG_BCR);
456 		if (!is_msgend(i2c)) {
461 			       i2c->base + SYNQUACER_I2C_REG_BCR);
464 		if (is_lastmsg(i2c)) {
466 			dev_dbg(i2c->dev, "READ: Send Stop\n");
467 			synquacer_i2c_stop(i2c, 0);
470 		dev_dbg(i2c->dev, "READ: Next Transfer\n");
472 		i2c->msg_ptr = 0;
473 		i2c->msg_idx++;
474 		i2c->msg++;
476 		ret = synquacer_i2c_master_start(i2c, i2c->msg);
478 			dev_dbg(i2c->dev, "restart error (%d)\n", ret);
479 			synquacer_i2c_stop(i2c, -EAGAIN);
481 			i2c->state = STATE_START;
485 		dev_err(i2c->dev, "called in err STATE (%d)\n", i2c->state);
490 	WAIT_PCLK(10, i2c->pclkrate);
497 	struct synquacer_i2c *i2c;
501 	i2c = i2c_get_adapdata(adap);
502 	i2c->timeout_ms = calc_timeout_ms(i2c, msgs, num);
504 	dev_dbg(i2c->dev, "calculated timeout %d ms\n", i2c->timeout_ms);
507 		ret = synquacer_i2c_doxfer(i2c, msgs, num);
511 		dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
513 		synquacer_i2c_hw_reset(i2c);
537 	struct synquacer_i2c *i2c;
541 	i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
542 	if (!i2c)
551 				 &i2c->pclkrate);
553 	i2c->pclk = devm_clk_get(&pdev->dev, "pclk");
554 	if (PTR_ERR(i2c->pclk) == -EPROBE_DEFER)
556 	if (!IS_ERR_OR_NULL(i2c->pclk)) {
557 		dev_dbg(&pdev->dev, "clock source %p\n", i2c->pclk);
559 		ret = clk_prepare_enable(i2c->pclk);
562 		i2c->pclkrate = clk_get_rate(i2c->pclk);
565 	if (i2c->pclkrate < SYNQUACER_I2C_MIN_CLK_RATE ||
566 	    i2c->pclkrate > SYNQUACER_I2C_MAX_CLK_RATE)
569 				     i2c->pclkrate);
571 	i2c->base = devm_platform_ioremap_resource(pdev, 0);
572 	if (IS_ERR(i2c->base))
573 		return PTR_ERR(i2c->base);
575 	i2c->irq = platform_get_irq(pdev, 0);
576 	if (i2c->irq < 0)
577 		return i2c->irq;
579 	ret = devm_request_irq(&pdev->dev, i2c->irq, synquacer_i2c_isr,
580 			       0, dev_name(&pdev->dev), i2c);
582 		return dev_err_probe(&pdev->dev, ret, "cannot claim IRQ %d\n", i2c->irq);
584 	i2c->state = STATE_IDLE;
585 	i2c->dev = &pdev->dev;
586 	i2c->adapter = synquacer_i2c_ops;
587 	i2c_set_adapdata(&i2c->adapter, i2c);
588 	i2c->adapter.dev.parent = &pdev->dev;
589 	i2c->adapter.dev.of_node = pdev->dev.of_node;
590 	ACPI_COMPANION_SET(&i2c->adapter.dev, ACPI_COMPANION(&pdev->dev));
591 	i2c->adapter.nr = pdev->id;
592 	init_completion(&i2c->completion);
595 		i2c->speed_khz = SYNQUACER_I2C_SPEED_SM;
597 		i2c->speed_khz = SYNQUACER_I2C_SPEED_FM;
599 	synquacer_i2c_hw_init(i2c);
601 	ret = i2c_add_numbered_adapter(&i2c->adapter);
603 		return dev_err_probe(&pdev->dev, ret, "failed to add bus to i2c core\n");
605 	platform_set_drvdata(pdev, i2c);
608 		 dev_name(&i2c->adapter.dev));
615 	struct synquacer_i2c *i2c = platform_get_drvdata(pdev);
617 	i2c_del_adapter(&i2c->adapter);
618 	if (!IS_ERR(i2c->pclk))
619 		clk_disable_unprepare(i2c->pclk);
623 	{ .compatible = "socionext,synquacer-i2c" },