i2c/busses/i2c-pxa.c

24 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-pxa.h>
113  *  7 GCD    1 (Disables i2c unit response to general call messages as a slave)
115  *  5 SCLE   1 (Enables the i2c clock output for master mode (drives SCL)
207 	{ .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
210 	{ .compatible = "marvell,armada-3700-i2c", .data = (void *)REGS_A3700 },
216 	{ "pxa2xx-i2c",		REGS_PXA2XX },
218 	{ "ce4100-i2c",		REGS_CE4100 },
219 	{ "pxa910-i2c",		REGS_PXA910 },
220 	{ "armada-3700-i2c",	REGS_A3700  },
273 #define _IBMR(i2c)	((i2c)->reg_ibmr)
274 #define _IDBR(i2c)	((i2c)->reg_idbr)
275 #define _ICR(i2c)	((i2c)->reg_icr)
276 #define _ISR(i2c)	((i2c)->reg_isr)
277 #define _ISAR(i2c)	((i2c)->reg_isar)
278 #define _ILCR(i2c)	((i2c)->reg_ilcr)
279 #define _IWCR(i2c)	((i2c)->reg_iwcr)
354 static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
356 	dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno,
357 		readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
360 #define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __func__)
362 static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why)
365 	struct device *dev = &i2c->adap.dev;
368 		i2c->req_slave_addr >> 1, why);
370 		i2c->msg_num, i2c->msg_idx, i2c->msg_ptr);
372 		readl(_IBMR(i2c)), readl(_IDBR(i2c)), readl(_ICR(i2c)),
373 		readl(_ISR(i2c)));
375 	for (i = 0; i < i2c->irqlogidx; i++)
376 		pr_cont(" [%03x:%05x]", i2c->isrlog[i], i2c->icrlog[i]);
384 #define show_state(i2c) do { } while (0)
387 #define i2c_pxa_scream_blue_murder(i2c, why) do { } while (0)
391 static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
393 static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c)
395 	return !(readl(_ICR(i2c)) & ICR_SCLE);
398 static void i2c_pxa_abort(struct pxa_i2c *i2c)
402 	if (i2c_pxa_is_slavemode(i2c)) {
403 		dev_dbg(&i2c->adap.dev, "%s: called in slave mode\n", __func__);
407 	while ((i > 0) && (readl(_IBMR(i2c)) & IBMR_SDAS) == 0) {
408 		unsigned long icr = readl(_ICR(i2c));
413 		writel(icr, _ICR(i2c));
415 		show_state(i2c);
421 	writel(readl(_ICR(i2c)) & ~(ICR_MA | ICR_START | ICR_STOP),
422 	       _ICR(i2c));
425 static int i2c_pxa_wait_bus_not_busy(struct pxa_i2c *i2c)
431 		isr = readl(_ISR(i2c));
442 		show_state(i2c);
445 	show_state(i2c);
450 static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
456 			dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
457 				__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
459 		if (readl(_ISR(i2c)) & ISR_SAD) {
461 				dev_dbg(&i2c->adap.dev, "%s: Slave detected\n", __func__);
466 		 * quick check of the i2c lines themselves to ensure they've
469 		if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 &&
470 		    readl(_IBMR(i2c)) == (IBMR_SCLS | IBMR_SDAS)) {
472 				dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
480 		dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
485 static int i2c_pxa_set_master(struct pxa_i2c *i2c)
488 		dev_dbg(&i2c->adap.dev, "setting to bus master\n");
490 	if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) != 0) {
491 		dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__);
492 		if (!i2c_pxa_wait_master(i2c)) {
493 			dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__);
498 	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
503 static int i2c_pxa_wait_slave(struct pxa_i2c *i2c)
509 	show_state(i2c);
513 			dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
514 				__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
516 		if ((readl(_ISR(i2c)) & (ISR_UB|ISR_IBB)) == 0 ||
517 		    (readl(_ISR(i2c)) & ISR_SAD) != 0 ||
518 		    (readl(_ICR(i2c)) & ICR_SCLE) == 0) {
520 				dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
528 		dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
536 static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode)
538 	show_state(i2c);
546 		if (readl(_ICR(i2c)) & ICR_STOP) {
548 			writel(readl(_ICR(i2c)) & ~ICR_STOP, _ICR(i2c));
551 		if (!i2c_pxa_wait_slave(i2c)) {
552 			dev_err(&i2c->adap.dev, "%s: wait timedout\n",
558 	writel(readl(_ICR(i2c)) & ~(ICR_STOP|ICR_ACKNAK|ICR_MA), _ICR(i2c));
559 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
562 		dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c)));
563 		decode_ICR(readl(_ICR(i2c)));
567 #define i2c_pxa_set_slave(i2c, err)	do { } while (0)
570 static void i2c_pxa_do_reset(struct pxa_i2c *i2c)
573 	writel(ICR_UR, _ICR(i2c));
574 	writel(I2C_ISR_INIT, _ISR(i2c));
575 	writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
577 	if (i2c->reg_isar && IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
578 		writel(i2c->slave_addr, _ISAR(i2c));
581 	writel(I2C_ICR_INIT | (i2c->fast_mode ? i2c->fm_mask : 0), _ICR(i2c));
582 	writel(readl(_ICR(i2c)) | (i2c->high_mode ? i2c->hs_mask : 0), _ICR(i2c));
585 	dev_info(&i2c->adap.dev, "Enabling slave mode\n");
586 	writel(readl(_ICR(i2c)) | ICR_SADIE | ICR_ALDIE | ICR_SSDIE, _ICR(i2c));
589 	i2c_pxa_set_slave(i2c, 0);
592 static void i2c_pxa_enable(struct pxa_i2c *i2c)
595 	writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
599 static void i2c_pxa_reset(struct pxa_i2c *i2c)
604 	i2c_pxa_abort(i2c);
605 	i2c_pxa_do_reset(i2c);
606 	i2c_pxa_enable(i2c);
615 static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
622 		if (i2c->slave != NULL)
623 			i2c_slave_event(i2c->slave, I2C_SLAVE_READ_PROCESSED,
626 		writel(byte, _IDBR(i2c));
627 		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));   /* allow next byte */
631 static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
633 	u8 byte = readl(_IDBR(i2c));
635 	if (i2c->slave != NULL)
636 		i2c_slave_event(i2c->slave, I2C_SLAVE_WRITE_RECEIVED, &byte);
638 	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
641 static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
646 		dev_dbg(&i2c->adap.dev, "SAD, mode is slave-%cx\n",
649 	if (i2c->slave != NULL) {
653 			i2c_slave_event(i2c->slave, I2C_SLAVE_READ_REQUESTED,
655 			writel(byte, _IDBR(i2c));
657 			i2c_slave_event(i2c->slave, I2C_SLAVE_WRITE_REQUESTED,
667 	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
668 	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
673 		if ((readl(_IBMR(i2c)) & IBMR_SCLS) == IBMR_SCLS)
679 			dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
684 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
687 static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
690 		dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n");
692 	if (i2c->slave != NULL)
693 		i2c_slave_event(i2c->slave, I2C_SLAVE_STOP, NULL);
696 		dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n");
702 	if (i2c->msg)
703 		i2c_pxa_master_complete(i2c, I2C_RETRY);
708 	struct pxa_i2c *i2c = slave->adapter->algo_data;
710 	if (i2c->slave)
713 	if (!i2c->reg_isar)
716 	i2c->slave = slave;
717 	i2c->slave_addr = slave->addr;
719 	writel(i2c->slave_addr, _ISAR(i2c));
726 	struct pxa_i2c *i2c = slave->adapter->algo_data;
728 	WARN_ON(!i2c->slave);
730 	i2c->slave_addr = I2C_PXA_SLAVE_ADDR;
731 	writel(i2c->slave_addr, _ISAR(i2c));
733 	i2c->slave = NULL;
738 static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
743 		writel(0, _IDBR(i2c));
744 		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
748 static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
750 	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
753 static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
762 	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
763 	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
768 		if ((readl(_IBMR(i2c)) & IBMR_SCLS) == IBMR_SCLS)
774 			dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
779 	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
782 static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
784 	if (i2c->msg)
785 		i2c_pxa_master_complete(i2c, I2C_RETRY);
793 static inline void i2c_pxa_start_message(struct pxa_i2c *i2c)
800 	i2c->req_slave_addr = i2c_8bit_addr_from_msg(i2c->msg);
801 	writel(i2c->req_slave_addr, _IDBR(i2c));
806 	icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);
807 	writel(icr | ICR_START | ICR_TB, _ICR(i2c));
810 static inline void i2c_pxa_stop_message(struct pxa_i2c *i2c)
815 	icr = readl(_ICR(i2c));
817 	writel(icr, _ICR(i2c));
826 static int i2c_pxa_send_mastercode(struct pxa_i2c *i2c)
831 	spin_lock_irq(&i2c->lock);
832 	i2c->highmode_enter = true;
833 	writel(i2c->master_code, _IDBR(i2c));
835 	icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);
837 	writel(icr, _ICR(i2c));
839 	spin_unlock_irq(&i2c->lock);
840 	timeout = wait_event_timeout(i2c->wait,
841 			i2c->highmode_enter == false, HZ * 1);
843 	i2c->highmode_enter = false;
851 static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret)
853 	i2c->msg_ptr = 0;
854 	i2c->msg = NULL;
855 	i2c->msg_idx ++;
856 	i2c->msg_num = 0;
858 		i2c->msg_idx = ret;
859 	if (!i2c->use_pio)
860 		wake_up(&i2c->wait);
863 static void i2c_pxa_irq_txempty(struct pxa_i2c *i2c, u32 isr)
865 	u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);
876 		i2c_pxa_scream_blue_murder(i2c, "ALD set");
888 		(!((i2c->msg->flags & I2C_M_IGNORE_NAK) &&
898 			if (i2c->msg_ptr == 0 && i2c->msg_idx == 0)
903 		i2c_pxa_master_complete(i2c, ret);
909 		if (i2c->msg_ptr == i2c->msg->len - 1 &&
910 		    i2c->msg_idx == i2c->msg_num - 1)
914 	} else if (i2c->msg_ptr < i2c->msg->len) {
918 		writel(i2c->msg->buf[i2c->msg_ptr++], _IDBR(i2c));
926 		if ((i2c->msg_ptr == i2c->msg->len) &&
927 			((i2c->msg->flags & I2C_M_STOP) ||
928 			(i2c->msg_idx == i2c->msg_num - 1)))
931 	} else if (i2c->msg_idx < i2c->msg_num - 1) {
935 		i2c->msg_ptr = 0;
936 		i2c->msg_idx ++;
937 		i2c->msg++;
944 		if (i2c->msg->flags & I2C_M_NOSTART)
950 		i2c->req_slave_addr = i2c_8bit_addr_from_msg(i2c->msg);
951 		writel(i2c->req_slave_addr, _IDBR(i2c));
959 		if (i2c->msg->len == 0)
961 		i2c_pxa_master_complete(i2c, 0);
964 	i2c->icrlog[i2c->irqlogidx-1] = icr;
966 	writel(icr, _ICR(i2c));
967 	show_state(i2c);
970 static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
972 	u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);
977 	i2c->msg->buf[i2c->msg_ptr++] = readl(_IDBR(i2c));
979 	if (i2c->msg_ptr < i2c->msg->len) {
984 		if (i2c->msg_ptr == i2c->msg->len - 1)
989 		i2c_pxa_master_complete(i2c, 0);
992 	i2c->icrlog[i2c->irqlogidx-1] = icr;
994 	writel(icr, _ICR(i2c));
1001 	struct pxa_i2c *i2c = dev_id;
1002 	u32 isr = readl(_ISR(i2c));
1008 		dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
1009 			__func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
1013 	if (i2c->irqlogidx < ARRAY_SIZE(i2c->isrlog))
1014 		i2c->isrlog[i2c->irqlogidx++] = isr;
1016 	show_state(i2c);
1021 	writel(isr & VALID_INT_SOURCE, _ISR(i2c));
1024 		i2c_pxa_slave_start(i2c, isr);
1026 		i2c_pxa_slave_stop(i2c);
1028 	if (i2c_pxa_is_slavemode(i2c)) {
1030 			i2c_pxa_slave_txempty(i2c, isr);
1032 			i2c_pxa_slave_rxfull(i2c, isr);
1033 	} else if (i2c->msg && (!i2c->highmode_enter)) {
1035 			i2c_pxa_irq_txempty(i2c, isr);
1037 			i2c_pxa_irq_rxfull(i2c, isr);
1038 	} else if ((isr & ISR_ITE) && i2c->highmode_enter) {
1039 		i2c->highmode_enter = false;
1040 		wake_up(&i2c->wait);
1042 		i2c_pxa_scream_blue_murder(i2c, "spurious irq");
1051 static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
1059 	ret = i2c_pxa_wait_bus_not_busy(i2c);
1061 		dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
1062 		i2c_recover_bus(&i2c->adap);
1069 	ret = i2c_pxa_set_master(i2c);
1071 		dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
1075 	if (i2c->high_mode) {
1076 		ret = i2c_pxa_send_mastercode(i2c);
1078 			dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n");
1083 	spin_lock_irq(&i2c->lock);
1085 	i2c->msg = msg;
1086 	i2c->msg_num = num;
1087 	i2c->msg_idx = 0;
1088 	i2c->msg_ptr = 0;
1089 	i2c->irqlogidx = 0;
1091 	i2c_pxa_start_message(i2c);
1093 	spin_unlock_irq(&i2c->lock);
1098 	timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
1099 	i2c_pxa_stop_message(i2c);
1102 	 * We place the return code in i2c->msg_idx.
1104 	ret = i2c->msg_idx;
1106 	if (!timeout && i2c->msg_num) {
1107 		i2c_pxa_scream_blue_murder(i2c, "timeout with active message");
1108 		i2c_recover_bus(&i2c->adap);
1116 static int i2c_pxa_internal_xfer(struct pxa_i2c *i2c,
1124 		ret = xfer(i2c, msgs, num);
1127 		if (++i >= i2c->adap.retries)
1131 			dev_dbg(&i2c->adap.dev, "Retrying transmission\n");
1135 		i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
1138 	i2c_pxa_set_slave(i2c, ret);
1145 	struct pxa_i2c *i2c = adap->algo_data;
1147 	return i2c_pxa_internal_xfer(i2c, msgs, num, i2c_pxa_do_xfer);
1166 static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
1174 	while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB))
1178 		show_state(i2c);
1179 		dev_err(&i2c->adap.dev,
1187 	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
1192 static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
1198 	ret = i2c_pxa_pio_set_master(i2c);
1202 	i2c->msg = msg;
1203 	i2c->msg_num = num;
1204 	i2c->msg_idx = 0;
1205 	i2c->msg_ptr = 0;
1206 	i2c->irqlogidx = 0;
1208 	i2c_pxa_start_message(i2c);
1210 	while (i2c->msg_num > 0 && --timeout) {
1211 		i2c_pxa_handler(0, i2c);
1215 	i2c_pxa_stop_message(i2c);
1218 	 * We place the return code in i2c->msg_idx.
1220 	ret = i2c->msg_idx;
1224 		i2c_pxa_scream_blue_murder(i2c, "timeout (do_pio_xfer)");
1234 	struct pxa_i2c *i2c = adap->algo_data;
1240 	if (!(readl(_ICR(i2c)) & ICR_IUE))
1241 		i2c_pxa_reset(i2c);
1243 	return i2c_pxa_internal_xfer(i2c, msgs, num, i2c_pxa_do_pio_xfer);
1255 static int i2c_pxa_probe_dt(struct platform_device *pdev, struct pxa_i2c *i2c,
1264 	i2c->adap.nr = -1;
1266 	i2c->use_pio = of_property_read_bool(np, "mrvl,i2c-polling");
1267 	i2c->fast_mode = of_property_read_bool(np, "mrvl,i2c-fast-mode");
1275 			       struct pxa_i2c *i2c,
1283 		i2c->use_pio = plat->use_pio;
1284 		i2c->fast_mode = plat->fast_mode;
1285 		i2c->high_mode = plat->high_mode;
1286 		i2c->master_code = plat->master_code;
1287 		if (!i2c->master_code)
1288 			i2c->master_code = 0xe;
1289 		i2c->rate = plat->rate;
1296 	struct pxa_i2c *i2c = adap->algo_data;
1297 	u32 ibmr = readl(_IBMR(i2c));
1303 	gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS);
1304 	gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS);
1306 	WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery));
1311 	struct pxa_i2c *i2c = adap->algo_data;
1318 	isr = readl(_ISR(i2c));
1320 		dev_dbg(&i2c->adap.dev,
1322 		i2c_pxa_do_reset(i2c);
1325 	WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default));
1327 	dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n",
1328 	        readl(_IBMR(i2c)), readl(_ISR(i2c)));
1330 	i2c_pxa_enable(i2c);
1333 static int i2c_pxa_init_recovery(struct pxa_i2c *i2c)
1335 	struct i2c_bus_recovery_info *bri = &i2c->recovery;
1336 	struct device *dev = i2c->adap.dev.parent;
1347 	i2c->pinctrl = devm_pinctrl_get(dev);
1348 	if (PTR_ERR(i2c->pinctrl) == -ENODEV)
1349 		i2c->pinctrl = NULL;
1350 	if (IS_ERR(i2c->pinctrl))
1351 		return PTR_ERR(i2c->pinctrl);
1353 	if (!i2c->pinctrl)
1356 	i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl,
1358 	i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery");
1360 	if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) {
1362 			 PTR_ERR(i2c->pinctrl_default),
1363 			 PTR_ERR(i2c->pinctrl_recovery));
1405 	i2c->adap.bus_recovery_info = bri;
1414 	pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery);
1416 	return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default);
1423 	struct pxa_i2c *i2c;
1427 	i2c = devm_kzalloc(&dev->dev, sizeof(struct pxa_i2c), GFP_KERNEL);
1428 	if (!i2c)
1432 	i2c->adap.nr = dev->id;
1433 	i2c->adap.owner   = THIS_MODULE;
1434 	i2c->adap.retries = 5;
1435 	i2c->adap.algo_data = i2c;
1436 	i2c->adap.dev.parent = &dev->dev;
1438 	i2c->adap.dev.of_node = dev->dev.of_node;
1441 	i2c->reg_base = devm_platform_get_and_ioremap_resource(dev, 0, &res);
1442 	if (IS_ERR(i2c->reg_base))
1443 		return PTR_ERR(i2c->reg_base);
1449 	ret = i2c_pxa_init_recovery(i2c);
1453 	ret = i2c_pxa_probe_dt(dev, i2c, &i2c_type);
1455 		ret = i2c_pxa_probe_pdata(dev, i2c, &i2c_type);
1459 	spin_lock_init(&i2c->lock);
1460 	init_waitqueue_head(&i2c->wait);
1462 	strscpy(i2c->adap.name, "pxa_i2c-i2c", sizeof(i2c->adap.name));
1464 	i2c->clk = devm_clk_get(&dev->dev, NULL);
1465 	if (IS_ERR(i2c->clk))
1466 		return dev_err_probe(&dev->dev, PTR_ERR(i2c->clk),
1469 	i2c->reg_ibmr = i2c->reg_base + pxa_reg_layout[i2c_type].ibmr;
1470 	i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr;
1471 	i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr;
1472 	i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr;
1473 	i2c->fm_mask = pxa_reg_layout[i2c_type].fm;
1474 	i2c->hs_mask = pxa_reg_layout[i2c_type].hs;
1477 		i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
1480 		i2c->reg_ilcr = i2c->reg_base + pxa_reg_layout[i2c_type].ilcr;
1481 		i2c->reg_iwcr = i2c->reg_base + pxa_reg_layout[i2c_type].iwcr;
1484 	i2c->iobase = res->start;
1485 	i2c->iosize = resource_size(res);
1487 	i2c->irq = irq;
1489 	i2c->slave_addr = I2C_PXA_SLAVE_ADDR;
1490 	i2c->highmode_enter = false;
1493 		i2c->adap.class = plat->class;
1496 	if (i2c->high_mode) {
1497 		if (i2c->rate) {
1498 			clk_set_rate(i2c->clk, i2c->rate);
1499 			pr_info("i2c: <%s> set rate to %ld\n",
1500 				i2c->adap.name, clk_get_rate(i2c->clk));
1502 			pr_warn("i2c: <%s> clock rate not set\n",
1503 				i2c->adap.name);
1506 	clk_prepare_enable(i2c->clk);
1508 	if (i2c->use_pio) {
1509 		i2c->adap.algo = &i2c_pxa_pio_algorithm;
1511 		i2c->adap.algo = &i2c_pxa_algorithm;
1514 				dev_name(&dev->dev), i2c);
1521 	i2c_pxa_reset(i2c);
1523 	ret = i2c_add_numbered_adapter(&i2c->adap);
1527 	platform_set_drvdata(dev, i2c);
1530 	dev_info(&i2c->adap.dev, " PXA I2C adapter, slave address %d\n",
1531 		i2c->slave_addr);
1533 	dev_info(&i2c->adap.dev, " PXA I2C adapter\n");
1538 	clk_disable_unprepare(i2c->clk);
1544 	struct pxa_i2c *i2c = platform_get_drvdata(dev);
1546 	i2c_del_adapter(&i2c->adap);
1548 	clk_disable_unprepare(i2c->clk);
1553 	struct pxa_i2c *i2c = dev_get_drvdata(dev);
1555 	clk_disable(i2c->clk);
1562 	struct pxa_i2c *i2c = dev_get_drvdata(dev);
1564 	clk_enable(i2c->clk);
1565 	i2c_pxa_reset(i2c);
1579 		.name	= "pxa2xx-i2c",