Lines Matching refs:i2c
3 * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
4 * (https://opencores.org/project/i2c/overview)
19 #include <linux/i2c.h>
22 #include <linux/platform_data/i2c-ocores.h>
49 void (*setreg)(struct ocores_i2c *i2c, int reg, u8 value);
50 u8 (*getreg)(struct ocores_i2c *i2c, int reg);
89 static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u8 value)
91 iowrite8(value, i2c->base + (reg << i2c->reg_shift));
94 static void oc_setreg_16(struct ocores_i2c *i2c, int reg, u8 value)
96 iowrite16(value, i2c->base + (reg << i2c->reg_shift));
99 static void oc_setreg_32(struct ocores_i2c *i2c, int reg, u8 value)
101 iowrite32(value, i2c->base + (reg << i2c->reg_shift));
104 static void oc_setreg_16be(struct ocores_i2c *i2c, int reg, u8 value)
106 iowrite16be(value, i2c->base + (reg << i2c->reg_shift));
109 static void oc_setreg_32be(struct ocores_i2c *i2c, int reg, u8 value)
111 iowrite32be(value, i2c->base + (reg << i2c->reg_shift));
114 static inline u8 oc_getreg_8(struct ocores_i2c *i2c, int reg)
116 return ioread8(i2c->base + (reg << i2c->reg_shift));
119 static inline u8 oc_getreg_16(struct ocores_i2c *i2c, int reg)
121 return ioread16(i2c->base + (reg << i2c->reg_shift));
124 static inline u8 oc_getreg_32(struct ocores_i2c *i2c, int reg)
126 return ioread32(i2c->base + (reg << i2c->reg_shift));
129 static inline u8 oc_getreg_16be(struct ocores_i2c *i2c, int reg)
131 return ioread16be(i2c->base + (reg << i2c->reg_shift));
134 static inline u8 oc_getreg_32be(struct ocores_i2c *i2c, int reg)
136 return ioread32be(i2c->base + (reg << i2c->reg_shift));
139 static void oc_setreg_io_8(struct ocores_i2c *i2c, int reg, u8 value)
141 outb(value, i2c->iobase + reg);
144 static inline u8 oc_getreg_io_8(struct ocores_i2c *i2c, int reg)
146 return inb(i2c->iobase + reg);
149 static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
151 i2c->setreg(i2c, reg, value);
154 static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
156 return i2c->getreg(i2c, reg);
159 static void ocores_process(struct ocores_i2c *i2c, u8 stat)
161 struct i2c_msg *msg = i2c->msg;
168 spin_lock_irqsave(&i2c->process_lock, flags);
170 if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) {
172 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
173 wake_up(&i2c->wait);
179 i2c->state = STATE_ERROR;
180 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
184 if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) {
185 i2c->state =
189 i2c->state = STATE_ERROR;
190 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
194 msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
198 if (i2c->pos == msg->len) {
199 i2c->nmsgs--;
200 i2c->msg++;
201 i2c->pos = 0;
202 msg = i2c->msg;
204 if (i2c->nmsgs) { /* end? */
209 i2c->state = STATE_START;
211 oc_setreg(i2c, OCI2C_DATA, addr);
212 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
215 i2c->state = (msg->flags & I2C_M_RD)
218 i2c->state = STATE_DONE;
219 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
224 if (i2c->state == STATE_READ) {
225 oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ?
228 oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
229 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
233 spin_unlock_irqrestore(&i2c->process_lock, flags);
238 struct ocores_i2c *i2c = dev_id;
239 u8 stat = oc_getreg(i2c, OCI2C_STATUS);
241 if (i2c->flags & OCORES_FLAG_BROKEN_IRQ) {
247 ocores_process(i2c, stat);
254 * @i2c: ocores I2C device instance
256 static void ocores_process_timeout(struct ocores_i2c *i2c)
260 spin_lock_irqsave(&i2c->process_lock, flags);
261 i2c->state = STATE_ERROR;
262 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
263 spin_unlock_irqrestore(&i2c->process_lock, flags);
268 * @i2c: ocores I2C device instance
279 static int ocores_wait(struct ocores_i2c *i2c,
287 u8 status = oc_getreg(i2c, reg);
300 * @i2c: ocores I2C device instance
306 static int ocores_poll_wait(struct ocores_i2c *i2c)
311 if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) {
321 udelay((8 * 1000) / i2c->bus_clock_khz);
328 err = ocores_wait(i2c, OCI2C_STATUS, mask, 0, msecs_to_jiffies(1));
330 dev_warn(i2c->adap.dev.parent,
338 * @i2c: ocores I2C device instance
348 static int ocores_process_polling(struct ocores_i2c *i2c)
354 err = ocores_poll_wait(i2c);
358 ret = ocores_isr(-1, i2c);
362 if (i2c->flags & OCORES_FLAG_BROKEN_IRQ)
363 if (i2c->state == STATE_DONE)
371 static int ocores_xfer_core(struct ocores_i2c *i2c,
378 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
380 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~OCI2C_CTRL_IEN);
382 oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN);
384 i2c->msg = msgs;
385 i2c->pos = 0;
386 i2c->nmsgs = num;
387 i2c->state = STATE_START;
389 oc_setreg(i2c, OCI2C_DATA, i2c_8bit_addr_from_msg(i2c->msg));
390 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
393 ret = ocores_process_polling(i2c);
395 if (wait_event_timeout(i2c->wait,
396 (i2c->state == STATE_ERROR) ||
397 (i2c->state == STATE_DONE), HZ) == 0)
401 ocores_process_timeout(i2c);
405 return (i2c->state == STATE_DONE) ? num : -EIO;
420 static int ocores_init(struct device *dev, struct ocores_i2c *i2c)
424 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
428 oc_setreg(i2c, OCI2C_CONTROL, ctrl);
430 prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1;
433 diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz;
434 if (abs(diff) > i2c->bus_clock_khz / 10) {
437 i2c->ip_clock_khz, i2c->bus_clock_khz);
441 oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
442 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
445 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
446 oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN);
465 .name = "i2c-ocores",
472 .compatible = "opencores,i2c-ocores",
480 .compatible = "sifive,fu540-c000-i2c",
495 static u8 oc_getreg_grlib(struct ocores_i2c *i2c, int reg)
502 rd = ioread32be(i2c->base + (rreg << i2c->reg_shift));
509 static void oc_setreg_grlib(struct ocores_i2c *i2c, int reg, u8 value)
517 curr = ioread32be(i2c->base + (rreg << i2c->reg_shift));
525 iowrite32be(wr, i2c->base + (rreg << i2c->reg_shift));
529 struct ocores_i2c *i2c)
537 if (of_property_read_u32(np, "reg-shift", &i2c->reg_shift)) {
545 i2c->reg_shift = ilog2(val);
553 i2c->bus_clock_khz = 100;
555 i2c->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);
556 if (IS_ERR(i2c->clk))
557 return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk),
560 i2c->ip_clock_khz = clk_get_rate(i2c->clk) / 1000;
562 i2c->bus_clock_khz = clock_frequency / 1000;
563 if (i2c->ip_clock_khz == 0) {
571 i2c->ip_clock_khz = clock_frequency / 1000;
575 i2c->ip_clock_khz = val / 1000;
577 i2c->bus_clock_khz = clock_frequency / 1000;
582 &i2c->reg_io_width);
586 dev_dbg(&pdev->dev, "GRLIB variant of i2c-ocores\n");
587 i2c->setreg = oc_setreg_grlib;
588 i2c->getreg = oc_getreg_grlib;
594 #define ocores_i2c_of_probe(pdev, i2c) -ENODEV
599 struct ocores_i2c *i2c;
606 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
607 if (!i2c)
610 spin_lock_init(&i2c->process_lock);
614 i2c->base = devm_ioremap_resource(&pdev->dev, res);
615 if (IS_ERR(i2c->base))
616 return PTR_ERR(i2c->base);
621 i2c->iobase = res->start;
628 i2c->setreg = oc_setreg_io_8;
629 i2c->getreg = oc_getreg_io_8;
634 i2c->reg_shift = pdata->reg_shift;
635 i2c->reg_io_width = pdata->reg_io_width;
636 i2c->ip_clock_khz = pdata->clock_khz;
638 i2c->bus_clock_khz = pdata->bus_khz;
640 i2c->bus_clock_khz = 100;
642 ret = ocores_i2c_of_probe(pdev, i2c);
647 if (i2c->reg_io_width == 0)
648 i2c->reg_io_width = 1; /* Set to default value */
650 if (!i2c->setreg || !i2c->getreg) {
654 switch (i2c->reg_io_width) {
656 i2c->setreg = oc_setreg_8;
657 i2c->getreg = oc_getreg_8;
661 i2c->setreg = be ? oc_setreg_16be : oc_setreg_16;
662 i2c->getreg = be ? oc_getreg_16be : oc_getreg_16;
666 i2c->setreg = be ? oc_setreg_32be : oc_setreg_32;
667 i2c->getreg = be ? oc_getreg_32be : oc_getreg_32;
672 i2c->reg_io_width);
677 init_waitqueue_head(&i2c->wait);
686 "sifive,fu540-c000-i2c")) {
687 i2c->flags |= OCORES_FLAG_BROKEN_IRQ;
701 pdev->name, i2c);
708 ret = ocores_init(&pdev->dev, i2c);
713 platform_set_drvdata(pdev, i2c);
714 i2c->adap = ocores_adapter;
715 i2c_set_adapdata(&i2c->adap, i2c);
716 i2c->adap.dev.parent = &pdev->dev;
717 i2c->adap.dev.of_node = pdev->dev.of_node;
719 /* add i2c adapter to i2c tree */
720 ret = i2c_add_adapter(&i2c->adap);
727 i2c_new_client_device(&i2c->adap, pdata->devices + i);
735 struct ocores_i2c *i2c = platform_get_drvdata(pdev);
736 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
738 /* disable i2c logic */
740 oc_setreg(i2c, OCI2C_CONTROL, ctrl);
743 i2c_del_adapter(&i2c->adap);
748 struct ocores_i2c *i2c = dev_get_drvdata(dev);
749 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
753 oc_setreg(i2c, OCI2C_CONTROL, ctrl);
755 clk_disable_unprepare(i2c->clk);
761 struct ocores_i2c *i2c = dev_get_drvdata(dev);
765 ret = clk_prepare_enable(i2c->clk);
768 rate = clk_get_rate(i2c->clk) / 1000;
770 i2c->ip_clock_khz = rate;
771 return ocores_init(dev, i2c);
781 .name = "ocores-i2c",
792 MODULE_ALIAS("platform:ocores-i2c");