Lines Matching refs:i2c
74 #include <linux/i2c.h>
294 /* Timing parameters for i2c modes (in ns) */
414 static void img_i2c_writel(struct img_i2c *i2c, u32 offset, u32 value)
416 writel(value, i2c->base + offset);
419 static u32 img_i2c_readl(struct img_i2c *i2c, u32 offset)
421 return readl(i2c->base + offset);
436 static void img_i2c_wr_rd_fence(struct img_i2c *i2c)
438 if (i2c->need_wr_rd_fence) {
439 img_i2c_writel(i2c, SCB_CORE_REV_REG, 0);
440 img_i2c_writel(i2c, SCB_CORE_REV_REG, 0);
444 static void img_i2c_switch_mode(struct img_i2c *i2c, enum img_i2c_mode mode)
446 i2c->mode = mode;
447 i2c->int_enable = img_i2c_int_enable_by_mode[mode];
448 i2c->line_status = 0;
451 static void img_i2c_raw_op(struct img_i2c *i2c)
453 i2c->raw_timeout = 0;
454 img_i2c_writel(i2c, SCB_OVERRIDE_REG,
460 ((i2c->at_cur_cmd & OVERRIDE_CMD_MASK) << OVERRIDE_CMD_SHIFT) |
461 (i2c->at_cur_data << OVERRIDE_DATA_SHIFT));
472 static void img_i2c_atomic_op(struct img_i2c *i2c, int cmd, u8 data)
474 i2c->at_cur_cmd = cmd;
475 i2c->at_cur_data = data;
478 if (cmd == CMD_GEN_DATA && i2c->mode == MODE_ATOMIC) {
479 u32 line_status = img_i2c_readl(i2c, SCB_STATUS_REG);
483 img_i2c_switch_mode(i2c, MODE_RAW);
484 img_i2c_raw_op(i2c);
489 dev_dbg(i2c->adap.dev.parent,
492 i2c->at_t_done = (cmd == CMD_RET_DATA || cmd == CMD_RET_ACK);
493 i2c->at_slave_event = false;
494 i2c->line_status = 0;
496 img_i2c_writel(i2c, SCB_OVERRIDE_REG,
504 static void img_i2c_atomic_start(struct img_i2c *i2c)
506 img_i2c_switch_mode(i2c, MODE_ATOMIC);
507 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable);
508 img_i2c_atomic_op(i2c, CMD_GEN_START, 0x00);
511 static void img_i2c_soft_reset(struct img_i2c *i2c)
513 i2c->t_halt = false;
514 img_i2c_writel(i2c, SCB_CONTROL_REG, 0);
515 img_i2c_writel(i2c, SCB_CONTROL_REG,
530 static void img_i2c_transaction_halt(struct img_i2c *i2c, bool t_halt)
534 if (i2c->t_halt == t_halt)
536 i2c->t_halt = t_halt;
537 val = img_i2c_readl(i2c, SCB_CONTROL_REG);
542 img_i2c_writel(i2c, SCB_CONTROL_REG, val);
546 static void img_i2c_read_fifo(struct img_i2c *i2c)
548 while (i2c->msg.len) {
552 img_i2c_wr_rd_fence(i2c);
553 fifo_status = img_i2c_readl(i2c, SCB_FIFO_STATUS_REG);
557 data = img_i2c_readl(i2c, SCB_READ_DATA_REG);
558 *i2c->msg.buf = data;
560 img_i2c_writel(i2c, SCB_READ_FIFO_REG, 0xff);
561 i2c->msg.len--;
562 i2c->msg.buf++;
567 static void img_i2c_write_fifo(struct img_i2c *i2c)
569 while (i2c->msg.len) {
572 img_i2c_wr_rd_fence(i2c);
573 fifo_status = img_i2c_readl(i2c, SCB_FIFO_STATUS_REG);
577 img_i2c_writel(i2c, SCB_WRITE_DATA_REG, *i2c->msg.buf);
578 i2c->msg.len--;
579 i2c->msg.buf++;
583 if (!i2c->msg.len)
584 i2c->int_enable &= ~INT_FIFO_EMPTYING;
588 static void img_i2c_read(struct img_i2c *i2c)
590 img_i2c_switch_mode(i2c, MODE_AUTOMATIC);
591 if (!i2c->last_msg)
592 i2c->int_enable |= INT_SLAVE_EVENT;
594 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable);
595 img_i2c_writel(i2c, SCB_READ_ADDR_REG, i2c->msg.addr);
596 img_i2c_writel(i2c, SCB_READ_COUNT_REG, i2c->msg.len);
598 mod_timer(&i2c->check_timer, jiffies + msecs_to_jiffies(1));
602 static void img_i2c_write(struct img_i2c *i2c)
604 img_i2c_switch_mode(i2c, MODE_AUTOMATIC);
605 if (!i2c->last_msg)
606 i2c->int_enable |= INT_SLAVE_EVENT;
608 img_i2c_writel(i2c, SCB_WRITE_ADDR_REG, i2c->msg.addr);
609 img_i2c_writel(i2c, SCB_WRITE_COUNT_REG, i2c->msg.len);
611 mod_timer(&i2c->check_timer, jiffies + msecs_to_jiffies(1));
612 img_i2c_write_fifo(i2c);
615 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable);
623 static void img_i2c_complete_transaction(struct img_i2c *i2c, int status)
625 img_i2c_switch_mode(i2c, MODE_INACTIVE);
627 i2c->msg_status = status;
628 img_i2c_transaction_halt(i2c, false);
630 complete(&i2c->msg_complete);
633 static unsigned int img_i2c_raw_atomic_delay_handler(struct img_i2c *i2c,
637 img_i2c_atomic_op(i2c, i2c->at_cur_cmd, i2c->at_cur_data);
638 img_i2c_switch_mode(i2c, MODE_ATOMIC);
642 static unsigned int img_i2c_raw(struct img_i2c *i2c, u32 int_status,
646 if (i2c->raw_timeout == 0)
647 return img_i2c_raw_atomic_delay_handler(i2c,
649 --i2c->raw_timeout;
654 static unsigned int img_i2c_sequence(struct img_i2c *i2c, u32 int_status)
667 i2c->at_slave_event = true;
669 i2c->at_t_done = true;
671 if (!i2c->at_slave_event || !i2c->at_t_done)
675 if (i2c->at_cur_cmd >= 0 &&
676 i2c->at_cur_cmd < ARRAY_SIZE(continue_bits)) {
677 unsigned int cont_bits = continue_bits[i2c->at_cur_cmd];
681 if (!(i2c->line_status & cont_bits))
686 /* follow the sequence of commands in i2c->seq */
687 next_cmd = *i2c->seq;
690 img_i2c_writel(i2c, SCB_OVERRIDE_REG, 0);
695 ++i2c->seq;
696 next_data = *i2c->seq;
698 ++i2c->seq;
699 img_i2c_atomic_op(i2c, next_cmd, next_data);
704 static void img_i2c_reset_start(struct img_i2c *i2c)
707 img_i2c_switch_mode(i2c, MODE_SEQUENCE);
708 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable);
709 i2c->seq = img_i2c_reset_seq;
710 i2c->at_slave_event = true;
711 i2c->at_t_done = true;
712 i2c->at_cur_cmd = -1;
715 img_i2c_sequence(i2c, 0);
718 static void img_i2c_stop_start(struct img_i2c *i2c)
721 img_i2c_switch_mode(i2c, MODE_SEQUENCE);
722 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable);
723 i2c->seq = img_i2c_stop_seq;
724 i2c->at_slave_event = true;
725 i2c->at_t_done = true;
726 i2c->at_cur_cmd = -1;
729 img_i2c_sequence(i2c, 0);
732 static unsigned int img_i2c_atomic(struct img_i2c *i2c,
740 i2c->at_slave_event = true;
742 i2c->at_t_done = true;
744 if (!i2c->at_slave_event || !i2c->at_t_done)
746 if (i2c->line_status & LINESTAT_ABORT_DET) {
747 dev_dbg(i2c->adap.dev.parent, "abort condition detected\n");
749 i2c->msg_status = -EIO;
753 /* i2c->at_cur_cmd may have completed */
754 switch (i2c->at_cur_cmd) {
757 next_data = i2c_8bit_addr_from_msg(&i2c->msg);
760 if (i2c->line_status & LINESTAT_INPUT_HELD_V)
764 if (i2c->line_status & LINESTAT_ACK_DET ||
765 (i2c->line_status & LINESTAT_NACK_DET &&
766 i2c->msg.flags & I2C_M_IGNORE_NAK)) {
767 if (i2c->msg.len == 0) {
769 } else if (i2c->msg.flags & I2C_M_RD) {
773 next_data = *i2c->msg.buf;
774 --i2c->msg.len;
775 ++i2c->msg.buf;
777 } else if (i2c->line_status & LINESTAT_NACK_DET) {
778 i2c->msg_status = -EIO;
783 if (i2c->line_status & LINESTAT_INPUT_HELD_V) {
784 *i2c->msg.buf = (i2c->line_status &
787 --i2c->msg.len;
788 ++i2c->msg.buf;
789 if (i2c->msg.len)
796 if (i2c->line_status & LINESTAT_ACK_DET) {
799 i2c->msg_status = -EIO;
807 img_i2c_writel(i2c, SCB_OVERRIDE_REG, 0);
810 dev_err(i2c->adap.dev.parent, "bad atomic command %d\n",
811 i2c->at_cur_cmd);
812 i2c->msg_status = -EIO;
820 if (next_cmd == CMD_GEN_STOP && !i2c->msg_status &&
821 !i2c->last_msg)
823 img_i2c_atomic_op(i2c, next_cmd, next_data);
834 struct img_i2c *i2c = from_timer(i2c, t, check_timer);
838 spin_lock_irqsave(&i2c->lock, flags);
839 line_status = img_i2c_readl(i2c, SCB_STATUS_REG);
843 dev_dbg(i2c->adap.dev.parent,
846 img_i2c_writel(i2c, SCB_INT_MASK_REG,
847 i2c->int_enable | INT_SLAVE_EVENT);
850 spin_unlock_irqrestore(&i2c->lock, flags);
853 static unsigned int img_i2c_auto(struct img_i2c *i2c,
861 dev_dbg(i2c->adap.dev.parent, "abort condition detected\n");
863 if ((i2c->msg.flags & I2C_M_RD) &&
865 img_i2c_read_fifo(i2c);
867 i2c->msg_status = -EIO;
868 img_i2c_stop_start(i2c);
873 if (!i2c->last_msg && line_status & LINESTAT_START_BIT_DET) {
874 img_i2c_transaction_halt(i2c, !i2c->last_msg);
876 i2c->int_enable &= ~INT_SLAVE_EVENT;
879 mod_timer(&i2c->check_timer, jiffies + msecs_to_jiffies(1));
883 if (i2c->msg.flags & I2C_M_RD)
884 img_i2c_read_fifo(i2c);
888 if (i2c->msg.flags & I2C_M_RD) {
890 img_i2c_read_fifo(i2c);
891 if (i2c->msg.len == 0)
897 i2c->msg.len == 0)
899 img_i2c_write_fifo(i2c);
907 img_i2c_transaction_halt(i2c, false);
908 img_i2c_transaction_halt(i2c, !i2c->last_msg);
916 struct img_i2c *i2c = dev_id;
922 int_status = img_i2c_readl(i2c, SCB_INT_STATUS_REG);
924 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, int_status);
930 line_status = img_i2c_readl(i2c, SCB_STATUS_REG);
932 img_i2c_writel(i2c, SCB_CLEAR_REG,
935 img_i2c_wr_rd_fence(i2c);
938 spin_lock(&i2c->lock);
941 i2c->line_status &= ~LINESTAT_INPUT_DATA;
942 i2c->line_status |= line_status;
952 dev_crit(i2c->adap.dev.parent,
954 (i2c->msg.flags & I2C_M_RD) ? "reading" : "writing",
955 i2c->msg.addr);
960 if (i2c->mode == MODE_ATOMIC)
961 hret = img_i2c_atomic(i2c, int_status, line_status);
962 else if (i2c->mode == MODE_AUTOMATIC)
963 hret = img_i2c_auto(i2c, int_status, line_status);
964 else if (i2c->mode == MODE_SEQUENCE)
965 hret = img_i2c_sequence(i2c, int_status);
966 else if (i2c->mode == MODE_WAITSTOP && (int_status & INT_SLAVE_EVENT) &&
969 else if (i2c->mode == MODE_RAW)
970 hret = img_i2c_raw(i2c, int_status, line_status);
975 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, int_status & INT_LEVEL);
983 if (!i2c->last_msg || i2c->line_status & LINESTAT_STOP_BIT_DET)
986 img_i2c_switch_mode(i2c, MODE_WAITSTOP);
993 img_i2c_complete_transaction(i2c, status);
995 img_i2c_switch_mode(i2c, MODE_FATAL);
999 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable);
1001 spin_unlock(&i2c->lock);
1007 static int img_i2c_reset_bus(struct img_i2c *i2c)
1012 spin_lock_irqsave(&i2c->lock, flags);
1013 reinit_completion(&i2c->msg_complete);
1014 img_i2c_reset_start(i2c);
1015 spin_unlock_irqrestore(&i2c->lock, flags);
1017 time_left = wait_for_completion_timeout(&i2c->msg_complete,
1027 struct img_i2c *i2c = i2c_get_adapdata(adap);
1032 if (i2c->mode == MODE_SUSPEND) {
1037 if (i2c->mode == MODE_FATAL)
1068 spin_lock_irqsave(&i2c->lock, flags);
1072 * original or we'll confuse drivers and i2c-dev.
1074 i2c->msg = *msg;
1075 i2c->msg_status = 0;
1084 i2c->last_msg = (i == num - 1);
1085 reinit_completion(&i2c->msg_complete);
1093 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, ~0);
1094 img_i2c_writel(i2c, SCB_CLEAR_REG, ~0);
1097 img_i2c_atomic_start(i2c);
1103 img_i2c_transaction_halt(i2c, !i2c->last_msg);
1106 img_i2c_read(i2c);
1108 img_i2c_write(i2c);
1116 * complete while the i2c block was halted.
1118 img_i2c_transaction_halt(i2c, false);
1119 img_i2c_transaction_halt(i2c, !i2c->last_msg);
1121 spin_unlock_irqrestore(&i2c->lock, flags);
1123 time_left = wait_for_completion_timeout(&i2c->msg_complete,
1125 del_timer_sync(&i2c->check_timer);
1128 dev_err(adap->dev.parent, "i2c transfer timed out\n");
1129 i2c->msg_status = -ETIMEDOUT;
1133 if (i2c->msg_status)
1140 return i2c->msg_status ? i2c->msg_status : num;
1153 static int img_i2c_init(struct img_i2c *i2c)
1161 ret = pm_runtime_resume_and_get(i2c->adap.dev.parent);
1165 rev = img_i2c_readl(i2c, SCB_CORE_REV_REG);
1167 dev_info(i2c->adap.dev.parent,
1171 pm_runtime_mark_last_busy(i2c->adap.dev.parent);
1172 pm_runtime_put_autosuspend(i2c->adap.dev.parent);
1177 i2c->need_wr_rd_fence = true;
1182 if (i2c->bitrate <= timings[i].max_bitrate) {
1187 if (i2c->bitrate > timings[ARRAY_SIZE(timings) - 1].max_bitrate) {
1188 dev_warn(i2c->adap.dev.parent,
1190 i2c->bitrate,
1193 i2c->bitrate = timing.max_bitrate;
1196 bitrate_khz = i2c->bitrate / 1000;
1197 clk_khz = clk_get_rate(i2c->scb_clk) / 1000;
1233 img_i2c_writel(i2c, SCB_CLK_SET_REG, data);
1265 img_i2c_writel(i2c, SCB_TIME_TCKH_REG, tckh);
1266 img_i2c_writel(i2c, SCB_TIME_TCKL_REG, tckl);
1275 img_i2c_writel(i2c, SCB_TIME_TSDH_REG, data);
1284 img_i2c_writel(i2c, SCB_TIME_TPL_REG, data);
1290 img_i2c_writel(i2c, SCB_TIME_TPH_REG, data);
1293 img_i2c_writel(i2c, SCB_TIME_TSDL_REG, data + tsdh + 2);
1299 img_i2c_writel(i2c, SCB_TIME_TP2S_REG, data);
1301 img_i2c_writel(i2c, SCB_TIME_TBI_REG, TIMEOUT_TBI);
1302 img_i2c_writel(i2c, SCB_TIME_TSL_REG, TIMEOUT_TSL);
1303 img_i2c_writel(i2c, SCB_TIME_TDL_REG, TIMEOUT_TDL);
1306 img_i2c_soft_reset(i2c);
1309 img_i2c_writel(i2c, SCB_INT_MASK_REG, 0);
1312 img_i2c_writel(i2c, SCB_INT_CLEAR_REG, ~0);
1315 img_i2c_writel(i2c, SCB_CLEAR_REG, ~0);
1318 img_i2c_writel(i2c, SCB_INT_MASK_REG, i2c->int_enable);
1321 ret = img_i2c_reset_bus(i2c);
1323 pm_runtime_mark_last_busy(i2c->adap.dev.parent);
1324 pm_runtime_put_autosuspend(i2c->adap.dev.parent);
1332 struct img_i2c *i2c;
1336 i2c = devm_kzalloc(&pdev->dev, sizeof(struct img_i2c), GFP_KERNEL);
1337 if (!i2c)
1340 i2c->base = devm_platform_ioremap_resource(pdev, 0);
1341 if (IS_ERR(i2c->base))
1342 return PTR_ERR(i2c->base);
1348 i2c->sys_clk = devm_clk_get(&pdev->dev, "sys");
1349 if (IS_ERR(i2c->sys_clk)) {
1351 return PTR_ERR(i2c->sys_clk);
1354 i2c->scb_clk = devm_clk_get(&pdev->dev, "scb");
1355 if (IS_ERR(i2c->scb_clk)) {
1357 return PTR_ERR(i2c->scb_clk);
1361 pdev->name, i2c);
1368 timer_setup(&i2c->check_timer, img_i2c_check_timer, 0);
1370 i2c->bitrate = timings[0].max_bitrate;
1372 i2c->bitrate = val;
1374 i2c_set_adapdata(&i2c->adap, i2c);
1375 i2c->adap.dev.parent = &pdev->dev;
1376 i2c->adap.dev.of_node = node;
1377 i2c->adap.owner = THIS_MODULE;
1378 i2c->adap.algo = &img_i2c_algo;
1379 i2c->adap.retries = 5;
1380 i2c->adap.nr = pdev->id;
1381 snprintf(i2c->adap.name, sizeof(i2c->adap.name), "IMG SCB I2C");
1383 img_i2c_switch_mode(i2c, MODE_INACTIVE);
1384 spin_lock_init(&i2c->lock);
1385 init_completion(&i2c->msg_complete);
1387 platform_set_drvdata(pdev, i2c);
1398 ret = img_i2c_init(i2c);
1402 ret = i2c_add_numbered_adapter(&i2c->adap);
1418 struct img_i2c *i2c = platform_get_drvdata(dev);
1420 i2c_del_adapter(&i2c->adap);
1428 struct img_i2c *i2c = dev_get_drvdata(dev);
1430 clk_disable_unprepare(i2c->scb_clk);
1431 clk_disable_unprepare(i2c->sys_clk);
1438 struct img_i2c *i2c = dev_get_drvdata(dev);
1441 ret = clk_prepare_enable(i2c->sys_clk);
1447 ret = clk_prepare_enable(i2c->scb_clk);
1450 clk_disable_unprepare(i2c->sys_clk);
1459 struct img_i2c *i2c = dev_get_drvdata(dev);
1466 img_i2c_switch_mode(i2c, MODE_SUSPEND);
1473 struct img_i2c *i2c = dev_get_drvdata(dev);
1480 img_i2c_init(i2c);
1491 { .compatible = "img,scb-i2c" },
1498 .name = "img-i2c-scb",