Lines Matching defs:output
76 unsigned int output;
138 unsigned long output;
140 output = fout / (fdpll + 1);
141 if (output >= 400 * 1000 * 1000)
144 diff = abs((long)output - (long)target);
150 dpll->output = output;
161 "output:%u, fdpll:%u, n:%u, m:%u, diff:%lu\n",
162 dpll->output, dpll->fdpll, dpll->n, dpll->m, best_diff);
247 * Use the external LVDS or DSI PLL output as the dot clock when
271 * The ESCR register only exists in DU channels that can output to an
272 * LVDS or DPAT, and the OTAR register in DU channels that can output
534 /* Configure display timings and output routing */
703 /* Store the routes from the CRTC output to the DU outputs. */
715 rstate->outputs |= BIT(renc->output);
734 * the DU channel. We need to enable its clock output explicitly before
786 * Disable the LVDS clock output, see
787 * rcar_du_crtc_atomic_enable(). When the LVDS output is used,
799 * Disable the DSI clock output, see
1047 * CRC on the composer (VSP) output.