Lines Matching defs:uncore
188 xehp_load_dss_mask(struct intel_uncore *uncore,
202 fuse_val[i] = intel_uncore_read(uncore, va_arg(argp, i915_reg_t));
211 struct intel_uncore *uncore = gt->uncore;
231 xehp_load_dss_mask(uncore, &sseu->geometry_subslice_mask,
234 xehp_load_dss_mask(uncore, &sseu->compute_subslice_mask,
239 eu_en_fuse = intel_uncore_read(uncore, XEHP_EU_ENABLE) & XEHP_EU_ENA_MASK;
254 struct intel_uncore *uncore = gt->uncore;
272 s_en = intel_uncore_read(uncore, GEN11_GT_SLICE_ENABLE) &
276 g_dss_en = intel_uncore_read(uncore, GEN12_GT_GEOMETRY_DSS_ENABLE);
279 eu_en_fuse = ~(intel_uncore_read(uncore, GEN11_EU_DISABLE) &
295 struct intel_uncore *uncore = gt->uncore;
309 s_en = intel_uncore_read(uncore, GEN11_GT_SLICE_ENABLE) &
313 ss_en = ~intel_uncore_read(uncore, GEN11_GT_SUBSLICE_DISABLE);
315 eu_en = ~(intel_uncore_read(uncore, GEN11_EU_DISABLE) &
331 fuse = intel_uncore_read(gt->uncore, CHV_FUSE_GT);
382 struct intel_uncore *uncore = gt->uncore;
387 fuse2 = intel_uncore_read(uncore, GEN8_FUSE2);
413 eu_disable = intel_uncore_read(uncore, GEN9_EU_DISABLE(s));
487 struct intel_uncore *uncore = gt->uncore;
492 fuse2 = intel_uncore_read(uncore, GEN8_FUSE2);
503 eu_disable0 = intel_uncore_read(uncore, GEN8_EU_DISABLE0);
504 eu_disable1 = intel_uncore_read(uncore, GEN8_EU_DISABLE1);
505 eu_disable2 = intel_uncore_read(uncore, GEN8_EU_DISABLE2);
599 fuse1 = intel_uncore_read(gt->uncore, HSW_PAVP_FUSE1);