i915/display/intel_display_debugfs.c

50 	seq_printf(m, "FB tracking busy bits: 0x%08x\n",
53 	seq_printf(m, "FB tracking flip bits: 0x%08x\n",
85 	seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
99 		seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
117 		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
149 	seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
160 	seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
171 		seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
228 	seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
229 	seq_printf(m, "\taudio support: %s\n",
241 	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
249 	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
258 	seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
265 	seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
268 	seq_printf(m, "\tsubpixel order: %s\n",
270 	seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
294 	seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
298 	seq_printf(m, "\tmodes:\n");
365 		seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
370 	seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
375 		seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
393 	seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
409 		seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
426 		seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
436 			seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
456 	seq_printf(m, "%sUpdates: %llu\n", hdr, count);
485 		seq_printf(m, "%s%s\n", hdr, columns);
488 	seq_printf(m, "%sMin update: %lluns\n",
490 	seq_printf(m, "%sMax update: %lluns\n",
492 	seq_printf(m, "%sAverage update: %lluns\n",
494 	seq_printf(m, "%sOverruns > %uus: %u\n",
556 	seq_printf(m, "[CRTC:%d:%s]:\n",
559 	seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
564 	seq_printf(m, "\thw: enable=%s, active=%s\n",
566 	seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
568 	seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
571 	seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
578 		seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
588 	seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
607 	seq_printf(m, "CRTC info\n");
608 	seq_printf(m, "---------\n");
612 	seq_printf(m, "\n");
613 	seq_printf(m, "Connector info\n");
614 	seq_printf(m, "--------------\n");
676 	seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
684 		seq_printf(m, "Pipe %c\n", pipe_name(pipe));
688 			seq_printf(m, "  Plane%-8d%8u%8u%8u\n", plane_id + 1,
694 		seq_printf(m, "  %-13s%8u%8u%8u\n", "Cursor", entry->start,
734 	seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
760 		seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
901 				seq_printf(m, "%lx",
905 				seq_printf(m, "hdisplay: %d\n",
907 				seq_printf(m, "vdisplay: %d\n",
909 				seq_printf(m, "bpc: %u\n",
913 				seq_printf(m, "pattern: %d\n",
915 				seq_printf(m, "Number of lanes: %d\n",
917 				seq_printf(m, "Link Rate: %d\n",
919 				seq_printf(m, "level: %02x\n",
952 			seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
1088 	seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
1133 	seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
1181 		seq_printf(m, "DSC_Enabled: %s\n",
1183 		seq_printf(m, "DSC_Sink_Support: %s\n",
1185 		seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1192 		seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
1194 		seq_printf(m, "Force_DSC_Enable: %s\n",
1197 			seq_printf(m, "FEC_Sink_Support: %s\n",
1276 	seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1342 	seq_printf(m, "DSC_Output_Format: %s\n",
1409 	seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1479 	seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1492 	seq_printf(m, "%c\n", pipe_name(crtc->pipe));