gpu/drm/drm_edid.c

4281 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
4283 	unsigned int clock = cea_mode->clock;
4285 	if (drm_mode_vrefresh(cea_mode) % 6 != 0)
4293 	if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
4349 		struct drm_display_mode cea_mode;
4352 		drm_mode_init(&cea_mode, cea_mode_for_vic(vic));
4355 		clock1 = cea_mode.clock;
4356 		clock2 = cea_mode_alternate_clock(&cea_mode);
4363 			if (drm_mode_match(to_match, &cea_mode, match_flags))
4365 		} while (cea_mode_alternate_timings(vic, &cea_mode));
4390 		struct drm_display_mode cea_mode;
4393 		drm_mode_init(&cea_mode, cea_mode_for_vic(vic));
4396 		clock1 = cea_mode.clock;
4397 		clock2 = cea_mode_alternate_clock(&cea_mode);
4404 			if (drm_mode_match(to_match, &cea_mode, match_flags))
4406 		} while (cea_mode_alternate_timings(vic, &cea_mode));
4531 		const struct drm_display_mode *cea_mode = NULL;
4537 			cea_mode = cea_mode_for_vic(vic);
4538 			clock2 = cea_mode_alternate_clock(cea_mode);
4542 				cea_mode = &edid_4k_modes[vic];
4543 				clock2 = hdmi_mode_alternate_clock(cea_mode);
4547 		if (!cea_mode)
4550 		clock1 = cea_mode->clock;
4558 		newmode = drm_mode_duplicate(dev, cea_mode);
4657 	const struct drm_display_mode *cea_mode;
4660 	cea_mode = cea_mode_for_vic(video_code);
4661 	if (!cea_mode)
4664 	newmode = drm_mode_duplicate(dev, cea_mode);
5368 	const struct drm_display_mode *cea_mode;
5380 		cea_mode = cea_mode_for_vic(vic);
5381 		clock1 = cea_mode->clock;
5382 		clock2 = cea_mode_alternate_clock(cea_mode);
5387 			cea_mode = &edid_4k_modes[vic];
5388 			clock1 = cea_mode->clock;
5389 			clock2 = hdmi_mode_alternate_clock(cea_mode);