Lines Matching refs:I2C_IDX_TX_P2
34 #define I2C_IDX_TX_P2 2
43 [I2C_IDX_TX_P2] = 0x72,
51 [I2C_IDX_TX_P2] = 0x72,
124 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG,
136 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL3_REG,
248 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_ANALOG_CTRL0_REG,
272 err = regmap_update_bits(anx78xx->map[I2C_IDX_TX_P2],
360 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL8_REG,
384 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2],
445 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_INT_CTRL_REG, 0x01);
449 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2],
454 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_MASK1_REG,
495 anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
497 anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
536 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
614 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
635 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
640 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2],
756 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
762 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_VID_CTRL1_REG,
787 err = regmap_bulk_write(anx78xx->map[I2C_IDX_TX_P2],
976 anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P2], SP_POWERDOWN_CTRL_REG,
1062 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_STATUS1_REG,
1082 err = regmap_write(anx78xx->map[I2C_IDX_TX_P2],
1153 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DP_INT_STATUS1_REG,
1163 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2],
1288 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_IDL_REG,
1293 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_IDH_REG,
1300 err = regmap_read(anx78xx->map[I2C_IDX_TX_P2], SP_DEVICE_VERSION_REG,