Lines Matching refs:I2C_IDX_TX_P0
32 #define I2C_IDX_TX_P0 0
41 [I2C_IDX_TX_P0] = 0x78,
49 [I2C_IDX_TX_P0] = 0x70,
112 return anx_dp_aux_transfer(anx78xx->map[I2C_IDX_TX_P0], msg);
215 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
279 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL3_REG,
284 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL4_REG,
289 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
294 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
300 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_MISC_CTRL_REG,
332 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_AUX_CH_CTRL2_REG,
338 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
343 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
349 err = regmap_multi_reg_write(anx78xx->map[I2C_IDX_TX_P0],
355 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
369 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_HDCP_AUTO_TIMER_REG,
374 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
379 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
393 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_AUX_DEFER_CTRL_REG,
398 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
408 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
413 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
419 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
429 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
654 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
690 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
698 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
715 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
719 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
725 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0],
744 err = regmap_write(anx78xx->map[I2C_IDX_TX_P0], SP_DP_LT_CTRL_REG,
782 err = anx78xx_clear_bits(anx78xx->map[I2C_IDX_TX_P0],
793 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],
798 err = anx78xx_set_bits(anx78xx->map[I2C_IDX_TX_P0],