Lines Matching refs:pipe_data

461 			config_data->pipe_data[k].pix_clk_100hz = pipe->stream->timing.pix_clk_100hz;
462 config_data->pipe_data[k].min_refresh_in_hz = min_refresh_in_hz;
463 config_data->pipe_data[k].max_ramp_step = ramp_up_num_steps;
464 config_data->pipe_data[k].pipes = dc_dmub_srv_get_pipes_for_stream(dc, pipe->stream);
465 dc_dmub_srv_populate_fams_pipe_info(dc, context, pipe, &config_data->pipe_data[k]);
533 * @pipe_data: [in] Pipe data which stores the VBLANK/DRR info
548 struct dmub_cmd_fw_assisted_mclk_switch_pipe_data_v2 *pipe_data)
566 pipe_data->pipe_config.vblank_data.drr_info.drr_in_use = true;
567 pipe_data->pipe_config.vblank_data.drr_info.use_ramping = false; // for now don't use ramping
568 pipe_data->pipe_config.vblank_data.drr_info.drr_window_size_ms = 4; // hardcode 4ms DRR window for now
599 pipe_data->pipe_config.vblank_data.drr_info.min_vtotal_supported = min_vtotal_supported;
600 pipe_data->pipe_config.vblank_data.drr_info.max_vtotal_supported = max_vtotal_supported;
601 pipe_data->pipe_config.vblank_data.drr_info.drr_vblank_start_margin = dc->caps.subvp_drr_vblank_start_margin_us;
615 * the pipe_data (subvp_data and vblank_data). Also check if the VBLANK pipe
626 struct dmub_cmd_fw_assisted_mclk_switch_pipe_data_v2 *pipe_data =
627 &cmd->fw_assisted_mclk_switch_v2.config_data.pipe_data[cmd_pipe_index];
644 pipe_data->mode = VBLANK;
645 pipe_data->pipe_config.vblank_data.pix_clk_100hz = vblank_pipe->stream->timing.pix_clk_100hz;
646 pipe_data->pipe_config.vblank_data.vblank_start = vblank_pipe->stream->timing.v_total -
648 pipe_data->pipe_config.vblank_data.vtotal = vblank_pipe->stream->timing.v_total;
649 pipe_data->pipe_config.vblank_data.htotal = vblank_pipe->stream->timing.h_total;
650 pipe_data->pipe_config.vblank_data.vblank_pipe_index = vblank_pipe->pipe_idx;
651 pipe_data->pipe_config.vblank_data.vstartup_start = vblank_pipe->pipe_dlg_param.vstartup_start;
652 pipe_data->pipe_config.vblank_data.vblank_end =
657 populate_subvp_cmd_drr_info(dc, context, pipe, vblank_pipe, pipe_data);
686 struct dmub_cmd_fw_assisted_mclk_switch_pipe_data_v2 *pipe_data = NULL;
703 pipe_data = &cmd->fw_assisted_mclk_switch_v2.config_data.pipe_data[1];
705 pipe_data->pipe_config.subvp_data.prefetch_to_mall_start_lines =
711 pipe_data = &cmd->fw_assisted_mclk_switch_v2.config_data.pipe_data[0];
713 pipe_data->pipe_config.subvp_data.prefetch_to_mall_start_lines =
731 * pipe_data of the DMCUB SubVP command.
740 struct dmub_cmd_fw_assisted_mclk_switch_pipe_data_v2 *pipe_data =
741 &cmd->fw_assisted_mclk_switch_v2.config_data.pipe_data[cmd_pipe_index];
747 pipe_data->mode = SUBVP;
748 pipe_data->pipe_config.subvp_data.pix_clk_100hz = subvp_pipe->stream->timing.pix_clk_100hz;
749 pipe_data->pipe_config.subvp_data.htotal = subvp_pipe->stream->timing.h_total;
750 pipe_data->pipe_config.subvp_data.vtotal = subvp_pipe->stream->timing.v_total;
751 pipe_data->pipe_config.subvp_data.main_vblank_start =
753 pipe_data->pipe_config.subvp_data.main_vblank_end =
755 pipe_data->pipe_config.subvp_data.mall_region_lines = phantom_timing->v_addressable;
756 pipe_data->pipe_config.subvp_data.main_pipe_index = subvp_pipe->stream_res.tg->inst;
757 pipe_data->pipe_config.subvp_data.is_drr = subvp_pipe->stream->ignore_msa_timing_param &&
771 pipe_data->pipe_config.subvp_data.scale_factor_numerator = out_num;
772 pipe_data->pipe_config.subvp_data.scale_factor_denominator = out_den;
775 pipe_data->pipe_config.subvp_data.prefetch_lines =
779 pipe_data->pipe_config.subvp_data.prefetch_to_mall_start_lines =
782 pipe_data->pipe_config.subvp_data.processing_delay_lines =
787 pipe_data->pipe_config.subvp_data.main_split_pipe_index = subvp_pipe->bottom_pipe->pipe_idx;
789 pipe_data->pipe_config.subvp_data.main_split_pipe_index = subvp_pipe->next_odm_pipe->pipe_idx;
791 pipe_data->pipe_config.subvp_data.main_split_pipe_index = 0xF;
800 pipe_data->pipe_config.subvp_data.phantom_pipe_index = phantom_pipe->stream_res.tg->inst;
802 pipe_data->pipe_config.subvp_data.phantom_split_pipe_index = phantom_pipe->bottom_pipe->plane_res.hubp->inst;
804 pipe_data->pipe_config.subvp_data.phantom_split_pipe_index = phantom_pipe->next_odm_pipe->plane_res.hubp->inst;
806 pipe_data->pipe_config.subvp_data.phantom_split_pipe_index = 0xF;