amd/amdgpu/vcn_v4_0_3.c

55 static void vcn_v4_0_3_unified_ring_set_wptr(struct amdgpu_ring *ring);
64  * Set ring and irq function pointers
70 	/* re-use enc ring as unified ring */
90 	struct amdgpu_ring *ring;
114 		ring = &adev->vcn.inst[i].ring_enc[0];
115 		ring->use_doorbell = true;
118 			ring->doorbell_index =
122 			ring->doorbell_index =
126 		ring->vm_hub = AMDGPU_MMHUB0(adev->vcn.inst[i].aid_id);
127 		sprintf(ring->name, "vcn_unified_%d", adev->vcn.inst[i].aid_id);
128 		r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0,
207 	struct amdgpu_ring *ring;
216 			ring = &adev->vcn.inst[i].ring_enc[0];
217 			ring->wptr = 0;
218 			ring->wptr_old = 0;
219 			vcn_v4_0_3_unified_ring_set_wptr(ring);
220 			ring->sched.ready = true;
225 			ring = &adev->vcn.inst[i].ring_enc[0];
227 			if (ring->use_doorbell) {
229 					adev, ring->use_doorbell,
235 					VCN, GET_INST(VCN, ring->me),
237 					ring->doorbell_index
243 					VCN, GET_INST(VCN, ring->me),
247 			r = amdgpu_ring_test_helper(ring);
266  * Stop the VCN block, mark ring as not ready any more
718 	struct amdgpu_ring *ring;
815 	ring = &adev->vcn.inst[inst_idx].ring_enc[0];
817 	/* program the RB_BASE for ring buffer */
819 		     lower_32_bits(ring->gpu_addr));
821 		     upper_32_bits(ring->gpu_addr));
824 		     ring->ring_size / sizeof(uint32_t));
826 	/* resetting ring, fw should not check RB ring */
832 	/* Initialize the ring buffer's read and write pointers */
835 	ring->wptr = RREG32_SOC15(VCN, vcn_inst, regUVD_RB_WPTR);
842 	/*resetting done, fw can check RB ring */
1045 	struct amdgpu_ring *ring;
1178 		ring = &adev->vcn.inst[i].ring_enc[0];
1181 		/* program the RB_BASE for ring buffer */
1183 			     lower_32_bits(ring->gpu_addr));
1185 			     upper_32_bits(ring->gpu_addr));
1188 			     ring->ring_size / sizeof(uint32_t));
1190 		/* resetting ring, fw should not check RB ring */
1195 		/* Initialize the ring buffer's read and write pointers */
1203 		ring->wptr = RREG32_SOC15(VCN, vcn_inst, regUVD_RB_WPTR);
1348  * @ring: amdgpu_ring pointer
1352 static uint64_t vcn_v4_0_3_unified_ring_get_rptr(struct amdgpu_ring *ring)
1354 	struct amdgpu_device *adev = ring->adev;
1356 	if (ring != &adev->vcn.inst[ring->me].ring_enc[0])
1357 		DRM_ERROR("wrong ring id is identified in %s", __func__);
1359 	return RREG32_SOC15(VCN, GET_INST(VCN, ring->me), regUVD_RB_RPTR);
1365  * @ring: amdgpu_ring pointer
1369 static uint64_t vcn_v4_0_3_unified_ring_get_wptr(struct amdgpu_ring *ring)
1371 	struct amdgpu_device *adev = ring->adev;
1373 	if (ring != &adev->vcn.inst[ring->me].ring_enc[0])
1374 		DRM_ERROR("wrong ring id is identified in %s", __func__);
1376 	if (ring->use_doorbell)
1377 		return *ring->wptr_cpu_addr;
1379 		return RREG32_SOC15(VCN, GET_INST(VCN, ring->me),
1386  * @ring: amdgpu_ring pointer
1390 static void vcn_v4_0_3_unified_ring_set_wptr(struct amdgpu_ring *ring)
1392 	struct amdgpu_device *adev = ring->adev;
1394 	if (ring != &adev->vcn.inst[ring->me].ring_enc[0])
1395 		DRM_ERROR("wrong ring id is identified in %s", __func__);
1397 	if (ring->use_doorbell) {
1398 		*ring->wptr_cpu_addr = lower_32_bits(ring->wptr);
1399 		WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr));
1401 		WREG32_SOC15(VCN, GET_INST(VCN, ring->me), regUVD_RB_WPTR,
1402 			     lower_32_bits(ring->wptr));
1436  * vcn_v4_0_3_set_unified_ring_funcs - set unified ring functions
1440  * Set unified ring functions