amd/amdgpu/si.c

2425 	u32 data, orig;
2432 	orig = data = RREG32_PCIE_PORT(PCIE_LC_N_FTS_CNTL);
2435 	if (orig != data)
2438 	orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL3);
2440 	if (orig != data)
2443 	orig = data = RREG32_PCIE(PCIE_P_CNTL);
2445 	if (orig != data)
2448 	orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL);
2457 		if (orig != data)
2463 			orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0);
2466 			if (orig != data)
2469 			orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_1);
2472 			if (orig != data)
2475 			orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_0);
2478 			if (orig != data)
2481 			orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_1);
2484 			if (orig != data)
2488 				orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0);
2490 				if (orig != data)
2493 				orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_1);
2495 				if (orig != data)
2498 				orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_2);
2500 				if (orig != data)
2503 				orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_3);
2505 				if (orig != data)
2508 				orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_0);
2510 				if (orig != data)
2513 				orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_1);
2515 				if (orig != data)
2518 				orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_2);
2520 				if (orig != data)
2523 				orig = data = si_pif_phy1_rreg(adev,PB1_PIF_PWRDOWN_3);
2525 				if (orig != data)
2528 			orig = data = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL);
2531 			if (orig != data)
2534 			orig = data = si_pif_phy0_rreg(adev,PB0_PIF_CNTL);
2538 			if (orig != data)
2541 			orig = data = si_pif_phy1_rreg(adev,PB1_PIF_CNTL);
2545 			if (orig != data)
2562 				orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL2);
2564 				if (orig != data)
2567 				orig = data = RREG32(THM_CLK_CNTL);
2570 				if (orig != data)
2573 				orig = data = RREG32(MISC_CLK_CNTL);
2576 				if (orig != data)
2579 				orig = data = RREG32(CG_CLKPIN_CNTL);
2581 				if (orig != data)
2584 				orig = data = RREG32(CG_CLKPIN_CNTL_2);
2586 				if (orig != data)
2589 				orig = data = RREG32(MPLL_BYPASSCLK_SEL);
2592 				if (orig != data)
2595 				orig = data = RREG32(SPLL_CNTL_MODE);
2597 				if (orig != data)
2602 		if (orig != data)
2606 	orig = data = RREG32_PCIE(PCIE_CNTL2);
2608 	if (orig != data)
2616 				orig = data = RREG32_PCIE_PORT(PCIE_LC_CNTL);
2618 				if (orig != data)