Lines Matching defs:sdma_rlc_reg_offset

185 	uint32_t sdma_rlc_reg_offset;
203 sdma_rlc_reg_offset = sdma_engine_reg_base
207 queue_id, sdma_rlc_reg_offset);
209 return sdma_rlc_reg_offset;
388 uint32_t sdma_rlc_reg_offset;
395 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id,
398 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,
403 data = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);
413 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET,
418 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);
419 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR,
421 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,
424 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1);
426 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,
428 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,
431 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,
433 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,
436 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0);
438 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base);
439 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,
441 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,
443 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,
448 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data);
457 uint32_t sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev,
468 DUMP_REG(sdma_rlc_reg_offset + reg);
470 DUMP_REG(sdma_rlc_reg_offset + reg);
473 DUMP_REG(sdma_rlc_reg_offset + reg);
476 DUMP_REG(sdma_rlc_reg_offset + reg);
509 uint32_t sdma_rlc_reg_offset;
513 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id,
516 sdma_rlc_rb_cntl = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL);
580 uint32_t sdma_rlc_reg_offset;
585 sdma_rlc_reg_offset = get_sdma_rlc_reg_offset(adev, m->sdma_engine_id,
588 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL);
590 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp);
593 temp = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_CONTEXT_STATUS);
603 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);
604 WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,
605 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL) |
608 m->sdmax_rlcx_rb_rptr = RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR);
610 RREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI);