amd/amdgpu/amdgpu.h

119 	struct amdgpu_device		*adev;
301 struct amdgpu_device;
347 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
349 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
351 bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,
377 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
382 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
385 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
391 bool amdgpu_get_bios(struct amdgpu_device *adev);
392 bool amdgpu_read_bios(struct amdgpu_device *adev);
393 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
455 	struct amdgpu_device		*adev;
499 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
500 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
505 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
574 	bool (*read_disabled_bios)(struct amdgpu_device *adev);
575 	bool (*read_bios_from_rom)(struct amdgpu_device *adev,
577 	int (*read_register)(struct amdgpu_device *adev, u32 se_num,
579 	void (*set_vga_state)(struct amdgpu_device *adev, bool state);
580 	int (*reset)(struct amdgpu_device *adev);
581 	enum amd_reset_method (*reset_method)(struct amdgpu_device *adev);
583 	u32 (*get_xclk)(struct amdgpu_device *adev);
585 	int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
586 	int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
588 	int (*get_pcie_lanes)(struct amdgpu_device *adev);
589 	void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
591 	u32 (*get_config_memsize)(struct amdgpu_device *adev);
593 	void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
595 	void (*invalidate_hdp)(struct amdgpu_device *adev,
598 	bool (*need_full_reset)(struct amdgpu_device *adev);
600 	void (*init_doorbell_index)(struct amdgpu_device *adev);
602 	void (*get_pcie_usage)(struct amdgpu_device *adev, uint64_t *count0,
605 	bool (*need_reset_on_init)(struct amdgpu_device *adev);
607 	uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);
609 	bool (*supports_baco)(struct amdgpu_device *adev);
611 	void (*pre_asic_init)(struct amdgpu_device *adev);
613 	int (*update_umd_stable_pstate)(struct amdgpu_device *adev, bool enter);
615 	int (*query_video_codecs)(struct amdgpu_device *adev, bool encode,
620 	ssize_t (*get_reg_state)(struct amdgpu_device *adev,
648 struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
654 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device*, uint32_t);
655 typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
657 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device*, uint64_t);
658 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device*, uint64_t, uint32_t);
660 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device*, uint32_t);
661 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device*, uint32_t, uint64_t);
663 typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device*, uint64_t);
664 typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device*, uint64_t, uint64_t);
666 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
667 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);
730 	int8_t (*logical_to_dev_inst)(struct amdgpu_device *adev,
733 	uint32_t (*logical_to_dev_mask)(struct amdgpu_device *adev,
801 	int (*init_mqd)(struct amdgpu_device *adev, void *mqd,
826 struct amdgpu_device {
945 	/* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */
1157 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev,
1166 static inline uint32_t amdgpu_ip_version_full(const struct amdgpu_device *adev,
1173 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
1175 	return container_of(ddev, struct amdgpu_device, ddev);
1178 static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev)
1183 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev)
1185 	return container_of(bdev, struct amdgpu_device, mman.bdev);
1188 int amdgpu_device_init(struct amdgpu_device *adev,
1190 void amdgpu_device_fini_hw(struct amdgpu_device *adev);
1191 void amdgpu_device_fini_sw(struct amdgpu_device *adev);
1193 int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);
1195 void amdgpu_device_mm_access(struct amdgpu_device *adev, loff_t pos,
1197 size_t amdgpu_device_aper_access(struct amdgpu_device *adev, loff_t pos,
1200 void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
1202 uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev,
1205 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev,
1207 u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev,
1209 uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev,
1212 void amdgpu_device_wreg(struct amdgpu_device *adev,
1215 void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev,
1217 void amdgpu_device_xcc_wreg(struct amdgpu_device *adev,
1221 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
1223 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
1224 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
1226 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
1228 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
1230 u64 amdgpu_device_indirect_rreg64_ext(struct amdgpu_device *adev,
1232 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
1234 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
1236 void amdgpu_device_indirect_wreg64_ext(struct amdgpu_device *adev,
1238 u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
1240 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
1242 void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev);
1244 int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
1250 int emu_soc_asic_init(struct amdgpu_device *adev);
1388 bool amdgpu_device_has_job_running(struct amdgpu_device *adev);
1389 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
1390 int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
1393 void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
1394 int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1395 bool amdgpu_device_need_post(struct amdgpu_device *adev);
1396 bool amdgpu_device_seamless_boot_supported(struct amdgpu_device *adev);
1397 bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1399 void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
1401 int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev);
1402 void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
1406 int amdgpu_device_mode1_reset(struct amdgpu_device *adev);
1412 bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
1413 				      struct amdgpu_device *peer_adev);
1417 void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
1419 void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
1422 void amdgpu_device_halt(struct amdgpu_device *adev);
1423 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev,
1425 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
1427 struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
1429 bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);
1460 int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags);
1468 int amdgpu_device_ip_suspend(struct amdgpu_device *adev);
1512 int amdgpu_acpi_init(struct amdgpu_device *adev);
1513 void amdgpu_acpi_fini(struct amdgpu_device *adev);
1514 bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_device *adev);
1516 int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev,
1518 int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
1521 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
1522 int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev, u64 *tmr_offset,
1524 int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, int xcc_id,
1528 bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev);
1532 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }
1533 static inline int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev,
1538 static inline int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev,
1544 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }
1545 static inline bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev) { return false; }
1549 static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
1556 bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
1557 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1558 void amdgpu_choose_low_power_state(struct amdgpu_device *adev);
1560 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }
1561 static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }
1562 static inline void amdgpu_choose_low_power_state(struct amdgpu_device *adev) { }
1566 int amdgpu_dm_display_resume(struct amdgpu_device *adev );
1568 static inline int amdgpu_dm_display_resume(struct amdgpu_device *adev) { return 0; }
1572 void amdgpu_register_gpu_instance(struct amdgpu_device *adev);
1573 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev);
1584 bool amdgpu_device_skip_hw_access(struct amdgpu_device *adev);
1586 int amdgpu_device_set_cg_state(struct amdgpu_device *adev,
1588 int amdgpu_device_set_pg_state(struct amdgpu_device *adev,
1591 static inline bool amdgpu_device_has_timeouts_enabled(struct amdgpu_device *adev)
1602 static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)
1607 int amdgpu_in_reset(struct amdgpu_device *adev);