drivers/dma/fsl_raid.c

86 /* Add descriptors into per chan software queue - submit_q */
95 	re_chan = container_of(tx->chan, struct fsl_re_chan, chan);
105 /* Copy descriptor from per chan software queue into hardware job ring */
106 static void fsl_re_issue_pending(struct dma_chan *chan)
113 	re_chan = container_of(chan, struct fsl_re_chan, chan);
155 	fsl_re_issue_pending(&re_chan->chan);
220 		dev_err(re_chan->dev, "chan error irqstate: %x, status: %x\n",
232 static enum dma_status fsl_re_tx_status(struct dma_chan *chan,
236 	return dma_cookie_status(chan, cookie, txstate);
256 	dma_async_tx_descriptor_init(&desc->async_tx, &re_chan->chan);
316 		struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src,
329 	re_chan = container_of(chan, struct fsl_re_chan, chan);
391 		struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src,
395 	return fsl_re_prep_dma_genq(chan, dest, src, src_cnt, NULL, len, flags);
403 		struct dma_chan *chan, dma_addr_t *dest, dma_addr_t *src,
416 	re_chan = container_of(chan, struct fsl_re_chan, chan);
437 		tx = fsl_re_prep_dma_genq(chan, dest[1], dma_src, 2, coef, len,
454 		return fsl_re_prep_dma_genq(chan, dest[1], src, src_cnt,
526 		struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
536 	re_chan = container_of(chan, struct fsl_re_chan, chan);
572 static int fsl_re_alloc_chan_resources(struct dma_chan *chan)
580 	re_chan = container_of(chan, struct fsl_re_chan, chan);
602 static void fsl_re_free_chan_resources(struct dma_chan *chan)
607 	re_chan = container_of(chan, struct fsl_re_chan, chan);
620 		dev_err(re_chan->dev, "chan resource cannot be cleaned!\n");
628 	struct fsl_re_chan *chan;
639 	chan = devm_kzalloc(dev, sizeof(*chan), GFP_KERNEL);
640 	if (!chan)
643 	/* create platform device for chan node */
659 	chan->jrregs = (struct fsl_re_chan_cfg *)((u8 *)re_priv->re_regs +
663 	chan->irq = irq_of_parse_and_map(np, 0);
664 	if (!chan->irq) {
670 	snprintf(chan->name, sizeof(chan->name), "re_jr%02d", q);
673 	tasklet_setup(&chan->irqtask, fsl_re_dequeue);
675 	ret = request_irq(chan->irq, fsl_re_isr, 0, chan->name, chandev);
682 	re_priv->re_jrs[q] = chan;
683 	chan->chan.device = dma_dev;
684 	chan->chan.private = chan;
685 	chan->dev = chandev;
686 	chan->re_dev = re_priv;
688 	spin_lock_init(&chan->desc_lock);
689 	INIT_LIST_HEAD(&chan->ack_q);
690 	INIT_LIST_HEAD(&chan->active_q);
691 	INIT_LIST_HEAD(&chan->submit_q);
692 	INIT_LIST_HEAD(&chan->free_q);
694 	chan->inb_ring_virt_addr = dma_pool_alloc(chan->re_dev->hw_desc_pool,
695 		GFP_KERNEL, &chan->inb_phys_addr);
696 	if (!chan->inb_ring_virt_addr) {
702 	chan->oub_ring_virt_addr = dma_pool_alloc(chan->re_dev->hw_desc_pool,
703 		GFP_KERNEL, &chan->oub_phys_addr);
704 	if (!chan->oub_ring_virt_addr) {
711 	out_be32(&chan->jrregs->inbring_base_h,
712 		 chan->inb_phys_addr & FSL_RE_ADDR_BIT_MASK);
713 	out_be32(&chan->jrregs->oubring_base_h,
714 		 chan->oub_phys_addr & FSL_RE_ADDR_BIT_MASK);
715 	out_be32(&chan->jrregs->inbring_base_l,
716 		 chan->inb_phys_addr >> FSL_RE_ADDR_BIT_SHIFT);
717 	out_be32(&chan->jrregs->oubring_base_l,
718 		 chan->oub_phys_addr >> FSL_RE_ADDR_BIT_SHIFT);
719 	out_be32(&chan->jrregs->inbring_size,
721 	out_be32(&chan->jrregs->oubring_size,
725 	status = in_be32(&chan->jrregs->jr_config_1) & FSL_RE_REG_LIODN_MASK;
728 	out_be32(&chan->jrregs->jr_config_1,
731 	dev_set_drvdata(chandev, chan);
734 	out_be32(&chan->jrregs->jr_command, FSL_RE_ENABLE);
739 	dma_pool_free(chan->re_dev->hw_desc_pool, chan->inb_ring_virt_addr,
740 		      chan->inb_phys_addr);
849 static void fsl_re_remove_chan(struct fsl_re_chan *chan)
851 	tasklet_kill(&chan->irqtask);
853 	dma_pool_free(chan->re_dev->hw_desc_pool, chan->inb_ring_virt_addr,
854 		      chan->inb_phys_addr);
856 	dma_pool_free(chan->re_dev->hw_desc_pool, chan->oub_ring_virt_addr,
857 		      chan->oub_phys_addr);
869 	/* Cleanup chan related memory areas */