Lines Matching refs:ret

66 	int ret;
90 ret = regulator_set_voltage_tol(pu_reg, imx6_soc_volt[index], 0);
91 if (ret) {
92 dev_err(cpu_dev, "failed to scale vddpu up: %d\n", ret);
93 return ret;
96 ret = regulator_set_voltage_tol(soc_reg, imx6_soc_volt[index], 0);
97 if (ret) {
98 dev_err(cpu_dev, "failed to scale vddsoc up: %d\n", ret);
99 return ret;
101 ret = regulator_set_voltage_tol(arm_reg, volt, 0);
102 if (ret) {
104 "failed to scale vddarm up: %d\n", ret);
105 return ret;
157 ret = clk_set_rate(clks[ARM].clk, new_freq * 1000);
158 if (ret) {
161 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
166 return ret;
175 ret = regulator_set_voltage_tol(arm_reg, volt, 0);
176 if (ret)
178 "failed to scale vddarm down: %d\n", ret);
179 ret = regulator_set_voltage_tol(soc_reg, imx6_soc_volt[index], 0);
180 if (ret)
181 dev_warn(cpu_dev, "failed to scale vddsoc down: %d\n", ret);
183 ret = regulator_set_voltage_tol(pu_reg, imx6_soc_volt[index], 0);
184 if (ret)
185 dev_warn(cpu_dev, "failed to scale vddpu down: %d\n", ret);
216 int ret = dev_pm_opp_disable(dev, freq);
218 if (ret < 0 && ret != -ENODEV)
231 int ret;
234 ret = nvmem_cell_read_u32(dev, "speed_grade", &val);
235 if (ret)
236 return ret;
280 int ret = 0;
283 ret = nvmem_cell_read_u32(dev, "speed_grade", &val);
284 if (ret)
285 return ret;
322 return ret;
330 int num, ret;
353 ret = clk_bulk_get(cpu_dev, num_clks, clks);
354 if (ret)
363 ret = -EPROBE_DEFER;
369 ret = -ENOENT;
373 ret = dev_pm_opp_of_add_table(cpu_dev);
374 if (ret < 0) {
375 dev_err(cpu_dev, "failed to init OPP table: %d\n", ret);
381 ret = imx6ul_opp_check_speed_grading(cpu_dev);
383 ret = imx6q_opp_check_speed_grading(cpu_dev);
385 if (ret) {
386 dev_err_probe(cpu_dev, ret, "failed to read ocotp\n");
392 ret = num;
393 dev_err(cpu_dev, "no OPP table is found: %d\n", ret);
397 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
398 if (ret) {
399 dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
407 ret = -ENOMEM;
452 ret = regulator_set_voltage_time(soc_reg, imx6_soc_volt[0], imx6_soc_volt[num - 1]);
453 if (ret > 0)
454 transition_latency += ret * 1000;
456 ret = regulator_set_voltage_time(pu_reg, imx6_soc_volt[0], imx6_soc_volt[num - 1]);
457 if (ret > 0)
458 transition_latency += ret * 1000;
475 ret = regulator_set_voltage_time(arm_reg, min_volt, max_volt);
476 if (ret > 0)
477 transition_latency += ret * 1000;
479 ret = cpufreq_register_driver(&imx6q_cpufreq_driver);
480 if (ret) {
481 dev_err(cpu_dev, "failed register driver: %d\n", ret);
504 return ret;