drivers/clk/clk-lmk04832.c

188  * @num_channels: Number of available output channels (clkout count)
247  *        Each pair of clkout clocks share a single device clock (DCLKX_Y)
248  * @clkout: list of output clock references
249  * @clk_data: holds clkout related data like clk_hw* and number of clocks
268 	struct lmk_clkout *clkout;
703 	dev_dbg(lmk->dev, "clkout%02u: sysref_ddly=%u, dclkx_y_ddly=%u, "
1167 	struct lmk_clkout *clkout = container_of(hw, struct lmk_clkout, hw);
1168 	struct lmk04832 *lmk = clkout->lmk;
1176 	ret = regmap_read(lmk->regmap, LMK04832_REG_CLKOUT_CTRL2(clkout->id),
1183 	ret = regmap_read(lmk->regmap, LMK04832_REG_CLKOUT_SRC_MUX(clkout->id),
1190 				  LMK04832_REG_CLKOUT_CTRL4(clkout->id),
1198 	ret = regmap_read(lmk->regmap, LMK04832_REG_CLKOUT_FMT(clkout->id),
1203 	if (clkout->id % 2)
1213 	struct lmk_clkout *clkout = container_of(hw, struct lmk_clkout, hw);
1214 	struct lmk04832 *lmk = clkout->lmk;
1218 	if (clkout->format == LMK04832_VAL_CLKOUT_FMT_POWERDOWN)
1223 				 LMK04832_REG_CLKOUT_CTRL2(clkout->id),
1228 	ret = regmap_read(lmk->regmap, LMK04832_REG_CLKOUT_SRC_MUX(clkout->id),
1235 					 LMK04832_REG_CLKOUT_CTRL4(clkout->id),
1242 				  LMK04832_REG_CLKOUT_FMT(clkout->id),
1243 				  LMK04832_BIT_CLKOUT_FMT(clkout->id),
1244 				  clkout->format << 4 * (clkout->id % 2));
1249 	struct lmk_clkout *clkout = container_of(hw, struct lmk_clkout, hw);
1250 	struct lmk04832 *lmk = clkout->lmk;
1252 	regmap_update_bits(lmk->regmap, LMK04832_REG_CLKOUT_FMT(clkout->id),
1253 			   LMK04832_BIT_CLKOUT_FMT(clkout->id),
1259 	struct lmk_clkout *clkout = container_of(hw, struct lmk_clkout, hw);
1260 	struct lmk04832 *lmk = clkout->lmk;
1263 				  LMK04832_REG_CLKOUT_SRC_MUX(clkout->id),
1271 	struct lmk_clkout *clkout = container_of(hw, struct lmk_clkout, hw);
1272 	struct lmk04832 *lmk = clkout->lmk;
1276 	ret = regmap_read(lmk->regmap, LMK04832_REG_CLKOUT_SRC_MUX(clkout->id),
1325 		sprintf(name, "lmk-clkout%02d", num);
1336 	lmk->clkout[num].id = num;
1337 	lmk->clkout[num].lmk = lmk;
1338 	lmk->clkout[num].hw.init = &init;
1339 	lmk->clk_data->hws[num] = &lmk->clkout[num].hw;
1346 				      lmk->clkout[num].sysref));
1348 	return devm_clk_hw_register(lmk->dev, &lmk->clkout[num].hw);
1428 	lmk->clkout = devm_kcalloc(lmk->dev, info->num_channels,
1429 				   sizeof(*lmk->clkout), GFP_KERNEL);
1430 	if (!lmk->clkout) {
1471 		of_property_read_u32(child, "ti,clkout-fmt",
1472 				     &lmk->clkout[reg].format);
1474 		if (lmk->clkout[reg].format >= 0x0a && reg % 2 == 0
1476 			dev_err(lmk->dev, "invalid format for clkout%02d\n",
1479 		lmk->clkout[reg].sysref =
1480 			of_property_read_bool(child, "ti,clkout-sysref");