clk/bcm/clk-kona.c

34 static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width)
36 	return (reg_val & bitfield_mask(shift, width)) >> shift;
40 static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32 val)
44 	return (reg_val & ~mask) | (val << shift);
129 __ccu_write(struct ccu_data *ccu, u32 reg_offset, u32 reg_val)
131 	writel(reg_val, ccu->base + reg_offset);
329 		u32 reg_val;
331 		reg_val = __ccu_read(ccu, offset);
332 		reg_val |= mask;
333 		__ccu_write(ccu, offset, reg_val);
353 	u32 reg_val;
360 	reg_val = __ccu_read(ccu, gate->offset);
362 	return (reg_val & bit_mask) != 0;
390 	u32 reg_val;
398 	reg_val = __ccu_read(ccu, gate->offset);
404 			reg_val |= mask;
406 			reg_val &= ~mask;
419 		reg_val |= mask;
421 		reg_val &= ~mask;
423 	__ccu_write(ccu, gate->offset, reg_val);
522 	u32 reg_val;
532 	reg_val = __ccu_read(ccu, offset);
533 	reg_val |= mask;
534 	__ccu_write(ccu, offset, reg_val);
559 	u32 reg_val;
566 	reg_val = __ccu_read(ccu, div->u.s.offset);
570 	reg_div = bitfield_extract(reg_val, div->u.s.shift, div->u.s.width);
588 	u32 reg_val;
599 		reg_val = __ccu_read(ccu, div->u.s.offset);
600 		reg_div = bitfield_extract(reg_val, div->u.s.shift,
618 	reg_val = __ccu_read(ccu, div->u.s.offset);
619 	reg_val = bitfield_replace(reg_val, div->u.s.shift, div->u.s.width,
621 	__ccu_write(ccu, div->u.s.offset, reg_val);
835 	u32 reg_val;
845 	reg_val = __ccu_read(ccu, sel->offset);
848 	parent_sel = bitfield_extract(reg_val, sel->shift, sel->width);
870 	u32 reg_val;
884 		reg_val = __ccu_read(ccu, sel->offset);
885 		parent_sel = bitfield_extract(reg_val, sel->shift, sel->width);
903 	reg_val = __ccu_read(ccu, sel->offset);
904 	reg_val = bitfield_replace(reg_val, sel->shift, sel->width, parent_sel);
905 	__ccu_write(ccu, sel->offset, reg_val);