base/regmap/regmap.c

601 static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
613 	/* Retrieve the endianness specification from the bus config */
614 	if (bus && bus->reg_format_endian_default)
615 		endian = bus->reg_format_endian_default;
617 	/* If the bus specified a non-default value, use that */
626 					 const struct regmap_bus *bus,
651 	/* Retrieve the endianness specification from the bus config */
652 	if (bus && bus->val_format_endian_default)
653 		endian = bus->val_format_endian_default;
655 	/* If the bus specified a non-default value, use that */
665 			     const struct regmap_bus *bus,
724 		if ((bus && bus->fast_io) ||
754 	if ((bus && bus->fast_io) || config->fast_io)
776 	map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
777 	map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
778 	map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
779 	if (bus) {
780 		map->max_raw_read = bus->max_raw_read;
781 		map->max_raw_write = bus->max_raw_write;
787 	map->bus = bus;
815 	} else if (bus) {
816 		map->read_flag_mask = bus->read_flag_mask;
830 	} else if (!bus) {
837 	} else if (!bus->read || !bus->write) {
840 		map->reg_update_bits = bus->reg_update_bits;
846 		map->reg_update_bits = bus->reg_update_bits;
848 		map->read = bus->read;
849 		map->write = bus->write;
851 		reg_endian = regmap_get_reg_endian(bus, config);
852 		val_endian = regmap_get_val_endian(dev, bus, config);
1175 				  const struct regmap_bus *bus,
1187 	regmap = __regmap_init(dev, bus, bus_context, config,
1450 	if (map->bus && map->bus->free_context)
1451 		map->bus->free_context(map->bus_context);
1467 	if (map->bus && map->bus->free_on_exit)
1468 		kfree(map->bus);
1693 	if (map->async && map->bus && map->bus->async_write) {
1707 			async = map->bus->async_alloc();
1730 			ret = map->bus->async_write(map->bus_context,
1736 			ret = map->bus->async_write(map->bus_context,
1765 	else if (map->bus && map->bus->gather_write)
1766 		ret = map->bus->gather_write(map->bus_context, map->work_buf,
1875 	return map->bus->reg_write(map->bus_context, reg, val);
1897 	return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
2109 		ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2111 		ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2149  * The regmap API usually assumes that bulk bus write operations will write a
2167 	if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2187 	if (map->bus->reg_noinc_write) {
2568 	WARN_ON(!map->bus);
2605  * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2607  * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2682  * If supported by the underlying bus the write will be scheduled
2761 	return map->bus->reg_read(map->bus_context, reg, val);
3023 	if (map->bus->reg_noinc_read) {
3321 	if (!map->bus || !map->bus->async_write)