s390/pci/pci_clp.c

101 				      struct clp_rsp_query_pci_grp *response)
103 	zdev->tlb_refresh = response->refresh;
104 	zdev->dma_mask = response->dasm;
105 	zdev->msi_addr = response->msia;
106 	zdev->max_msi = response->noi;
107 	zdev->fmb_update = response->mui;
108 	zdev->version = response->version;
109 	zdev->maxstbl = response->maxstbl;
110 	zdev->dtsm = response->dtsm;
112 	switch (response->version) {
134 	rrb->response.hdr.len = sizeof(rrb->response);
138 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
139 		clp_store_query_pci_fngrp(zdev, &rrb->response);
142 		zpci_err_clp(rrb->response.hdr.rsp, rc);
150 				  struct clp_rsp_query_pci *response)
155 		zdev->bars[i].val = le32_to_cpu(response->bar[i]);
156 		zdev->bars[i].size = response->bar_size[i];
158 	zdev->start_dma = response->sdma;
159 	zdev->end_dma = response->edma;
160 	zdev->pchid = response->pchid;
161 	zdev->pfgid = response->pfgid;
162 	zdev->pft = response->pft;
163 	zdev->vfn = response->vfn;
164 	zdev->port = response->port;
165 	zdev->uid = response->uid;
166 	zdev->fmb_length = sizeof(u32) * response->fmb_len;
167 	zdev->rid_available = response->rid_avail;
168 	zdev->is_physfn = response->is_physfn;
170 		zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN;
172 	memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
173 	if (response->util_str_avail) {
174 		memcpy(zdev->util_str, response->util_str,
178 	zdev->mio_capable = response->mio_addr_avail;
180 		if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))
183 		zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
184 		zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
201 	rrb->response.hdr.len = sizeof(rrb->response);
205 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
206 		rc = clp_store_query_pci_fn(zdev, &rrb->response);
209 		rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
212 		zpci_err_clp(rrb->response.hdr.rsp, rc);
248 		rrb->response.hdr.len = sizeof(rrb->response);
255 		if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
261 	} while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
263 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
264 		*fh = rrb->response.fh;
267 		zpci_err_clp(rrb->response.hdr.rsp, rc);
269 			rc = rrb->response.hdr.rsp;
288 	rrb->response.hdr.len = sizeof(rrb->response);
291 	if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
292 		if (rrb->response.vwb) {
293 			wb_bit_pos = rrb->response.mio_wb;
302 		zpci_err_clp(rrb->response.hdr.rsp, rc);
346 	rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
351 	if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
353 		zpci_err_clp(rrb->response.hdr.rsp, rc);
357 	update_uid_checking(rrb->response.uid_checking);
358 	WARN_ON_ONCE(rrb->response.entry_size !=
361 	*nentries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
362 		rrb->response.entry_size;
363 	*resume_token = rrb->response.resume_token;
379 			cb(&rrb->response.fh_list[i], data);
396 		fh_list = rrb->response.fh_list;
486 	    lpcb->response.hdr.len > limit)
506 	    lpcb->response.hdr.len > limit)
516 	    lpcb->response.hdr.len > limit)
529 	    lpcb->response.hdr.len > limit)
542 	    lpcb->response.hdr.len > limit)