Lines Matching refs:psw
215 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
216 regs->psw.addr = new_psw; \
222 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
223 regs->psw.addr = new_psw; \
243 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
296 static inline void __load_psw(psw_t psw)
298 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
308 psw_t psw;
310 psw.mask = mask;
317 : "=&d" (addr), "=Q" (psw.addr) : "Q" (psw) : "memory", "cc");
366 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
370 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
371 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
373 return (psw.addr - ilc) & mask;
381 psw_t psw;
383 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
384 psw.addr = _THIS_IP_;
385 __load_psw(psw);
393 return arch_irqs_disabled_flags(regs->psw.mask);