Lines Matching refs:eeh_ops
76 if (!eeh_ops || !eeh_ops->err_inject)
96 ret = eeh_ops->err_inject(pe, type, func, addr, mask);
818 eeh_ops->read_config(edev, aer + PCI_ERR_UNCOR_MASK,
821 eeh_ops->write_config(edev, aer + PCI_ERR_UNCOR_MASK,
825 eeh_ops->read_config(edev, PCI_BRIDGE_CONTROL, 2, &ctrl);
827 eeh_ops->write_config(edev, PCI_BRIDGE_CONTROL, 2, ctrl);
832 eeh_ops->read_config(edev, PCI_BRIDGE_CONTROL, 2, &ctrl);
834 eeh_ops->write_config(edev, PCI_BRIDGE_CONTROL, 2, ctrl);
840 eeh_ops->read_config(edev, aer + PCI_ERR_UNCOR_MASK,
843 eeh_ops->write_config(edev, aer + PCI_ERR_UNCOR_MASK,
916 eeh_ops->read_config(edev, pos, 2, &status);
937 eeh_ops->read_config(edev, edev->pcie_cap + PCI_EXP_DEVCAP, 4, ®);
947 eeh_ops->read_config(edev, edev->pcie_cap + PCI_EXP_DEVCTL,
950 eeh_ops->write_config(edev, edev->pcie_cap + PCI_EXP_DEVCTL,
955 eeh_ops->read_config(edev, edev->pcie_cap + PCI_EXP_DEVCTL,
958 eeh_ops->write_config(edev, edev->pcie_cap + PCI_EXP_DEVCTL,
975 eeh_ops->read_config(edev, edev->af_cap + PCI_AF_CAP, 1, &cap);
990 eeh_ops->write_config(edev, edev->af_cap + PCI_AF_CTRL,
995 eeh_ops->write_config(edev, edev->af_cap + PCI_AF_CTRL, 1, 0);
1378 ret = eeh_ops->get_state(dev_pe, NULL);
1574 state = eeh_ops->get_state(parent_pe, NULL);
1627 static struct eeh_ops pnv_eeh_ops = {