powerpc/kernel/head_booke.h

49 	mtspr	SPRN_SPRG_WSCRATCH0, r10;	/* save one register */	     \
50 	mfspr	r10, SPRN_SPRG_THREAD;					     \
51 	stw	r11, THREAD_NORMSAVE(0)(r10);				     \
52 	stw	r13, THREAD_NORMSAVE(2)(r10);				     \
63 	lwz	r11, TASK_STACK - THREAD(r10);				     \
71 	lwz	r12, THREAD_NORMSAVE(0)(r10);				     \
73 	lwz	r13, THREAD_NORMSAVE(2)(r10); /* restore r13 */		     \
74 	mflr	r10;							     \
75 	stw	r10,_LINK(r11);						     \
86 	lis	r10, STACK_FRAME_REGS_MARKER@ha	/* exception frame marker */
87 	addi	r10, r10, STACK_FRAME_REGS_MARKER@l
88 	stw	r10, STACK_INT_FRAME_MARKER(r1)
89 	li	r10, \trapno
90 	stw	r10,_TRAP(r1)
96 	mfctr	r10
98 	stw	r10,_CTR(r1)
100 	mfspr	r10,SPRN_XER
102 	stw	r10,_XER(r1)
116 	mfspr	r10, SPRN_SPRG_THREAD
119 	mtspr	SPRN_SPRG_WSCRATCH0, r10
120 	stw	r11, THREAD_NORMSAVE(0)(r10)
121 	stw	r13, THREAD_NORMSAVE(2)(r10)
129 	lwz	r13, THREAD_NORMSAVE(2)(r10)
139 	lwz	r1, TASK_STACK - THREAD(r10)
198 	stw	r10,GPR10(r8);						     \
203 	BOOKE_CLEAR_BTB(r10)						\
213 	lwz	r10,GPR10(r8);		/* copy regs from exception stack  */\
215 	stw	r10,GPR10(r11);						     \
216 	lwz	r10,GPR11(r8);						     \
218 	stw	r10,GPR11(r11);						     \
224 	mflr	r10;							     \
225 	stw	r10,_LINK(r11);						     \
284 	mtspr	SPRN_SPRG_WSCRATCH0, r10;	/* save one register */	     \
285 	mfspr	r10, SPRN_SPRG_THREAD;					     \
286 	stw	r11, THREAD_NORMSAVE(0)(r10);				     \
288 	stw	r13, THREAD_NORMSAVE(2)(r10);				     \
354 	mfspr	r10,SPRN_DBSR;		/* check single-step/branch taken */  \
355 	andis.	r10,r10,(DBSR_IC|DBSR_BT)@h;				      \
358 	lis	r10,interrupt_base@h;	/* check if exception in vectors */   \
359 	ori	r10,r10,interrupt_base@l;				      \
360 	cmplw	r12,r10;						      \
363 	lis	r10,interrupt_end@h;					      \
364 	ori	r10,r10,interrupt_end@l;				      \
365 	cmplw	r12,r10;						      \
370 	lis	r10,(DBSR_IC|DBSR_BT)@h;	/* clear the IC event */      \
371 	mtspr	SPRN_DBSR,r10;						      \
373 	lwz	r10,_CCR(r11);						      \
376 	mtcrf	0x80,r10;						      \
383 	lwz	r10,GPR10(r8);						      \
412 	mfspr	r10,SPRN_DBSR;		/* check single-step/branch taken */  \
413 	andis.	r10,r10,(DBSR_IC|DBSR_BT)@h;				      \
416 	lis	r10,interrupt_base@h;	/* check if exception in vectors */   \
417 	ori	r10,r10,interrupt_base@l;				      \
418 	cmplw	r12,r10;						      \
421 	lis	r10,interrupt_end@h;					      \
422 	ori	r10,r10,interrupt_end@l;				      \
423 	cmplw	r12,r10;						      \
428 	lis	r10,(DBSR_IC|DBSR_BT)@h;	/* clear the IC event */      \
429 	mtspr	SPRN_DBSR,r10;						      \
431 	lwz	r10,_CCR(r11);						      \
434 	mtcrf	0x80,r10;						      \
441 	lwz	r10,GPR10(r8);						      \