Lines Matching refs:timer
7 * Partial timer rewrite and additional dynamic tick timer support by
11 * MPU timer code based on the older MPU timer code for OMAP
76 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
77 return readl(&timer->read_tim);
82 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
84 writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl);
89 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
91 writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl);
97 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
103 writel(MPU_TIMER_CLOCK_ENABLE, &timer->cntl);
105 writel(load_val, &timer->load_tim);
107 writel(timerflags, &timer->cntl);
112 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
114 writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl);
119 * MPU timer 1 ... count down to zero, interrupt, reload
175 * MPU timer 2 ... free running 32-bit clock source and scheduler clock
186 omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(1);
193 if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
218 pr_err("Bogus timer, should not happen\n");