Lines Matching refs:sc

62 r12au_init_rx_agg(struct rtwn_softc *sc)
64 struct r12a_softc *rs = sc->sc_priv;
67 rtwn_write_2(sc, R92C_RXDMA_AGG_PG_TH,
69 rtwn_setbits_1(sc, R92C_TRXDMA_CTRL, 0,
74 r12au_init_burstlen_usb2(struct rtwn_softc *sc)
78 if ((rtwn_read_1(sc, R92C_USB_INFO) & 0x30) == 0) {
80 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M,
84 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M,
90 r12au_init_burstlen(struct rtwn_softc *sc)
94 if (rtwn_read_1(sc, R92C_TYPE_ID + 3) & 0x80)
95 r12au_init_burstlen_usb2(sc);
98 rtwn_setbits_1(sc, R12A_RXDMA_PRO, R12A_BURST_SZ_M,
101 rtwn_setbits_1(sc, 0xf008, 0x18, 0);
106 r12au_arfb_init(struct rtwn_softc *sc)
109 rtwn_write_4(sc, R12A_ARFR_5G(0), 0x00000010);
110 rtwn_write_4(sc, R12A_ARFR_5G(0) + 4, 0xfffff000);
113 rtwn_write_4(sc, R12A_ARFR_5G(1), 0x00000010);
114 rtwn_write_4(sc, R12A_ARFR_5G(1) + 4, 0x003ff000);
117 rtwn_write_4(sc, R12A_ARFR_2G(0), 0x00000015);
118 rtwn_write_4(sc, R12A_ARFR_2G(0) + 4, 0x003ff000);
121 rtwn_write_4(sc, R12A_ARFR_2G(1), 0x00000015);
122 rtwn_write_4(sc, R12A_ARFR_2G(1) + 4, 0xffcff000);
126 r12au_init_ampdu_fwhw(struct rtwn_softc *sc)
128 rtwn_setbits_1(sc, R92C_FWHW_TXQ_CTRL,
133 r12au_init_ampdu(struct rtwn_softc *sc)
135 struct r12a_softc *rs = sc->sc_priv;
138 rtwn_write_1(sc, 0xf050, 0x01);
141 rtwn_write_2(sc, R92C_RXDMA_STATUS, 0x7400);
143 rtwn_write_1(sc, R92C_RXDMA_STATUS + 1, 0xf5);
146 rtwn_write_1(sc, R12A_AMPDU_MAX_TIME, rs->ampdu_max_time);
147 rtwn_write_4(sc, R12A_AMPDU_MAX_LENGTH, 0xffffffff);
150 rtwn_write_1(sc, R92C_USTIME_TSF, 0x50);
151 rtwn_write_1(sc, R92C_USTIME_EDCA, 0x50);
153 rtwn_r12a_init_burstlen(sc);
156 rtwn_setbits_1(sc, R12A_HT_SINGLE_AMPDU, 0,
160 rtwn_write_1(sc, R92C_RX_PKT_LIMIT, 0x18);
162 rtwn_write_1(sc, R92C_PIFS, 0);
164 rtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x1f1f);
166 rtwn_r12a_init_ampdu_fwhw(sc);
169 rtwn_setbits_1(sc, R92C_RSV_CTRL, 0, 0x60);
171 r12au_arfb_init(sc);
175 r12au_post_init(struct rtwn_softc *sc)
179 rtwn_setbits_1(sc, R92C_QUEUE_CTRL, 0x08, 0);
181 rtwn_write_1(sc, R12A_EARLY_MODE_CONTROL + 3, 0x01);
184 rtwn_write_1(sc, R12A_SDIO_CTRL, 0);
185 rtwn_write_1(sc, R92C_ACLK_MON, 0);
187 rtwn_write_1(sc, R92C_USB_HRPWM, 0);
190 if (sc->sc_flags & RTWN_FW_LOADED) {
191 if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) {
193 sc->sc_ratectl = RTWN_RATECTL_NET80211;
195 sc->sc_ratectl = sc->sc_ratectl_sysctl;
198 sc->sc_ratectl = RTWN_RATECTL_NONE;