ath_hal/ar5212/ar2425.c

165 	struct ar2425State *priv = AR2425(ah);
172 	HALASSERT(priv);
184 	RF_BANK_SETUP(priv, 1, 1);
187 	RF_BANK_SETUP(priv, 2, modesIndex);
190 	RF_BANK_SETUP(priv, 3, modesIndex);
193 	RF_BANK_SETUP(priv, 6, modesIndex);
195         ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0);
196         ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0);
199 	RF_BANK_SETUP(priv, 7, modesIndex);
202 	HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites);
203 	HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites);
204 	HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites);
207 		HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data,
210 		HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data,
212 	HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites);
228 	struct ar2425State *priv = AR2425(ah);
230 	HALASSERT(priv != AH_NULL);
232 	case 1: return priv->Bank1Data;
233 	case 2: return priv->Bank2Data;
234 	case 3: return priv->Bank3Data;
235 	case 6: return priv->Bank6Data;
236 	case 7: return priv->Bank7Data;
687 	struct ar2425State *priv;
692 	priv = ath_hal_malloc(sizeof(struct ar2425State));
693 	if (priv == AH_NULL) {
699 	priv->base.rfDetach		= ar2425RfDetach;
700 	priv->base.writeRegs		= ar2425WriteRegs;
701 	priv->base.getRfBank		= ar2425GetRfBank;
702 	priv->base.setChannel		= ar2425SetChannel;
703 	priv->base.setRfRegs		= ar2425SetRfRegs;
704 	priv->base.setPowerTable	= ar2425SetPowerTable;
705 	priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower;
706 	priv->base.getNfAdjust		= ar5212GetNfAdjust;
708 	ahp->ah_pcdacTable = priv->pcdacTable;
709 	ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
710 	ahp->ah_rfHal = &priv->base;