ath_hal/ar9300/ar9300_reset.c

35 #define BASE_ACTIVATE_DELAY         100     /* usec */
36 #define RTC_PLL_SETTLE_DELAY        100     /* usec */
133     u_int32_t tx_lat, rx_lat, usec, slot, regval, eifs;
143             usec = SM(AR_USEC_HALF_FAST_CLOCK, AR_USEC_USEC);
147             usec = SM(AR_USEC_HALF, AR_USEC_USEC);
155             usec = SM(AR_USEC_QUARTER_FAST_CLOCK, AR_USEC_USEC);
159             usec = SM(AR_USEC_QUARTER, AR_USEC_USEC);
163     OS_REG_WRITE(ah, AR_USEC, (usec | regval | tx_lat | rx_lat));
666         /* AH_NF_CAL_DUR_TSF - 90 sec in usec units */
668         /* AH_NF_CAL_PERIOD_MAX_TSF - 180 sec in usec units */
1860     OS_DELAY(50); /* XXX 50 usec */
3333     OS_DELAY(10); /* 10 usec */