Lines Matching refs:p_pwr_array

821 ar9300_transmit_power_reg_write(struct ath_hal *ah, u_int8_t *p_pwr_array) 
836 POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 24)
837 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 16)
838 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 8)
839 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 0)
843 POW_SM(p_pwr_array[ALL_TARGET_LEGACY_54], 24)
844 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_48], 16)
845 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_36], 8)
846 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 0)
852 POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 24)
853 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 16)
855 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 0)
859 POW_SM(p_pwr_array[ALL_TARGET_LEGACY_11S], 24)
860 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_11L], 16)
861 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_5S], 8)
862 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 0)
868 POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 24)
869 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 16)
870 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 8)
871 | POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 0)
877 POW_SM(p_pwr_array[ALL_TARGET_HT20_5], 24)
878 | POW_SM(p_pwr_array[ALL_TARGET_HT20_4], 16)
879 | POW_SM(p_pwr_array[ALL_TARGET_HT20_1_3_9_11_17_19], 8)
880 | POW_SM(p_pwr_array[ALL_TARGET_HT20_0_8_16], 0)
885 POW_SM(p_pwr_array[ALL_TARGET_HT20_13], 24)
886 | POW_SM(p_pwr_array[ALL_TARGET_HT20_12], 16)
887 | POW_SM(p_pwr_array[ALL_TARGET_HT20_7], 8)
888 | POW_SM(p_pwr_array[ALL_TARGET_HT20_6], 0)
893 POW_SM(p_pwr_array[ALL_TARGET_HT20_21], 24)
894 | POW_SM(p_pwr_array[ALL_TARGET_HT20_20], 16)
895 | POW_SM(p_pwr_array[ALL_TARGET_HT20_15], 8)
896 | POW_SM(p_pwr_array[ALL_TARGET_HT20_14], 0)
902 POW_SM(p_pwr_array[ALL_TARGET_HT40_23], 24)
903 | POW_SM(p_pwr_array[ALL_TARGET_HT40_22], 16)
904 | POW_SM(p_pwr_array[ALL_TARGET_HT20_23], 8)
905 | POW_SM(p_pwr_array[ALL_TARGET_HT20_22], 0)
912 POW_SM(p_pwr_array[ALL_TARGET_HT40_5], 24)
913 | POW_SM(p_pwr_array[ALL_TARGET_HT40_4], 16)
914 | POW_SM(p_pwr_array[ALL_TARGET_HT40_1_3_9_11_17_19], 8)
915 | POW_SM(p_pwr_array[ALL_TARGET_HT40_0_8_16], 0)
920 POW_SM(p_pwr_array[ALL_TARGET_HT40_13], 24)
921 | POW_SM(p_pwr_array[ALL_TARGET_HT40_12], 16)
922 | POW_SM(p_pwr_array[ALL_TARGET_HT40_7], 8)
923 | POW_SM(p_pwr_array[ALL_TARGET_HT40_6], 0)
928 POW_SM(p_pwr_array[ALL_TARGET_HT40_21], 24)
929 | POW_SM(p_pwr_array[ALL_TARGET_HT40_20], 16)
930 | POW_SM(p_pwr_array[ALL_TARGET_HT40_15], 8)
931 | POW_SM(p_pwr_array[ALL_TARGET_HT40_14], 0)
940 u_int8_t *p_pwr_array)
951 tpc_reg_val = (SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], AR_TPC_ACK) |
952 SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], AR_TPC_CTS) |
956 tpc_reg_val = (SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], AR_TPC_ACK) |
957 SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], AR_TPC_CTS) |
2526 u_int8_t *p_pwr_array,
2746 p_pwr_array[i] =
2747 (u_int8_t)AH_MIN(p_pwr_array[i], min_ctl_power);
2753 p_pwr_array[i] =
2754 (u_int8_t)AH_MIN(p_pwr_array[i], min_ctl_power);
2769 if (reduce_pow <= p_pwr_array[i]) {
2770 p_pwr_array[i] -= reduce_pow;
2780 p_pwr_array[i] = 0;
2789 p_pwr_array[i] =
2790 (u_int8_t)AH_MIN(p_pwr_array[i], min_ctl_power);
2801 if (reduce_pow <= p_pwr_array[i]) {
2802 p_pwr_array[i] -= reduce_pow;
2815 if (p_pwr_array[i] > max_pwr) {
2816 p_pwr_array[i] = max_pwr;
2839 p_pwr_array[i] = (u_int8_t)
2840 AH_MIN(p_pwr_array[i], min_ctl_power);
2851 if (reduce_pow <= p_pwr_array[i]) {
2852 p_pwr_array[i] -= reduce_pow;
2865 if (p_pwr_array[i] > max_pwr) {
2866 p_pwr_array[i] = max_pwr;