dev/e1000/e1000_82543.c

88 	s32 ret_val = E1000_SUCCESS;
128 		ret_val = phy->ops.reset(hw);
129 		if (ret_val) {
136 	ret_val = e1000_get_phy_id(hw);
137 	if (ret_val)
144 			ret_val = -E1000_ERR_PHY;
150 			ret_val = -E1000_ERR_PHY;
155 		ret_val = -E1000_ERR_PHY;
161 	return ret_val;
387 	bool ret_val;
392 		ret_val = false;
396 	ret_val = dev_spec->init_phy_disabled;
399 	return ret_val;
491 	s32 ret_val = E1000_SUCCESS;
497 		ret_val = -E1000_ERR_PARAM;
533 	return ret_val;
547 	s32 ret_val = E1000_SUCCESS;
553 		ret_val = -E1000_ERR_PARAM;
580 	return ret_val;
744 	s32 ret_val;
748 	ret_val = e1000_phy_force_speed_duplex_m88(hw);
749 	if (ret_val)
754 		ret_val = e1000_polarity_reversal_workaround_82543(hw);
757 	return ret_val;
770 	s32 ret_val = E1000_SUCCESS;
782 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
783 	if (ret_val)
785 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
786 	if (ret_val)
789 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
790 	if (ret_val)
803 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
804 		if (ret_val)
807 		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
808 		if (ret_val)
821 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
822 	if (ret_val)
825 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
826 	if (ret_val)
829 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
830 	if (ret_val)
833 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
834 	if (ret_val)
837 	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
838 	if (ret_val)
845 	ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_TIME, 100000, &link);
846 	if (ret_val)
850 	return ret_val;
865 	s32 ret_val;
891 	ret_val = hw->phy.ops.get_cfg_done(hw);
893 	return ret_val;
905 	s32 ret_val = E1000_SUCCESS;
948 	return ret_val;
962 	s32 ret_val;
994 	ret_val = mac->ops.setup_link(hw);
1004 	return ret_val;
1023 	s32  ret_val;
1036 		ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
1037 		if (ret_val) {
1039 			ret_val = -E1000_ERR_NVM;
1047 	ret_val = e1000_setup_link_generic(hw);
1050 	return ret_val;
1064 	s32 ret_val;
1079 		ret_val = hw->phy.ops.reset(hw);
1080 		if (ret_val)
1088 	ret_val = e1000_copper_link_setup_m88(hw);
1089 	if (ret_val)
1097 		ret_val = e1000_copper_link_autoneg(hw);
1098 		if (ret_val)
1106 		ret_val = e1000_phy_force_speed_duplex_82543(hw);
1107 		if (ret_val) {
1117 	ret_val = e1000_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 10,
1119 	if (ret_val)
1129 			ret_val = e1000_config_mac_to_phy_82543(hw);
1130 			if (ret_val)
1133 		ret_val = e1000_config_fc_after_link_up_generic(hw);
1139 	return ret_val;
1152 	s32 ret_val;
1163 	ret_val = e1000_commit_fc_settings_generic(hw);
1164 	if (ret_val)
1179 		ret_val = e1000_poll_fiber_serdes_link_generic(hw);
1184 	return ret_val;
1202 	s32 ret_val;
1209 		ret_val = E1000_SUCCESS;
1213 	ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
1214 	if (ret_val)
1239 			ret_val = e1000_polarity_reversal_workaround_82543(hw);
1245 		ret_val = -E1000_ERR_CONFIG;
1261 		ret_val = e1000_config_mac_to_phy_82543(hw);
1262 		if (ret_val) {
1274 	ret_val = e1000_config_fc_after_link_up_generic(hw);
1275 	if (ret_val)
1287 		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
1288 		if (ret_val) {
1290 			return ret_val;
1324 	return ret_val;
1338 	s32 ret_val = E1000_SUCCESS;
1360 			ret_val = 0;
1374 		ret_val = e1000_config_fc_after_link_up_generic(hw);
1375 		if (ret_val) {
1394 	return ret_val;
1407 	s32 ret_val = E1000_SUCCESS;
1424 	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
1425 	if (ret_val)
1446 	return ret_val;
1572 	s32  ret_val = E1000_SUCCESS;
1579 		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
1580 		if (ret_val) {
1596 	return ret_val;