Lines Matching refs:sc
134 static int ale_rxeof(struct ale_softc *sc, int);
208 struct ale_softc *sc;
212 sc = device_get_softc(dev);
214 CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
218 v = CSR_READ_4(sc, ALE_MDIO);
224 device_printf(sc->ale_dev, "phy read timeout : %d\n", reg);
234 struct ale_softc *sc;
238 sc = device_get_softc(dev);
240 CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
245 v = CSR_READ_4(sc, ALE_MDIO);
251 device_printf(sc->ale_dev, "phy write timeout : %d\n", reg);
259 struct ale_softc *sc;
264 sc = device_get_softc(dev);
265 mii = device_get_softc(sc->ale_miibus);
266 ifp = sc->ale_ifp;
271 sc->ale_flags &= ~ALE_FLAG_LINK;
277 sc->ale_flags |= ALE_FLAG_LINK;
280 if ((sc->ale_flags & ALE_FLAG_FASTETHER) == 0)
281 sc->ale_flags |= ALE_FLAG_LINK;
289 ale_stop_mac(sc);
292 if ((sc->ale_flags & ALE_FLAG_LINK) != 0) {
293 ale_mac_config(sc);
295 reg = CSR_READ_4(sc, ALE_MAC_CFG);
297 CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
304 struct ale_softc *sc;
307 sc = ifp->if_softc;
308 ALE_LOCK(sc);
310 ALE_UNLOCK(sc);
313 mii = device_get_softc(sc->ale_miibus);
318 ALE_UNLOCK(sc);
324 struct ale_softc *sc;
329 sc = ifp->if_softc;
330 ALE_LOCK(sc);
331 mii = device_get_softc(sc->ale_miibus);
335 ALE_UNLOCK(sc);
363 ale_get_macaddr(struct ale_softc *sc)
368 reg = CSR_READ_4(sc, ALE_SPI_CTRL);
371 CSR_WRITE_4(sc, ALE_SPI_CTRL, reg);
374 if (pci_find_cap(sc->ale_dev, PCIY_VPD, &vpdc) == 0) {
379 CSR_WRITE_4(sc, ALE_TWSI_CTRL, CSR_READ_4(sc, ALE_TWSI_CTRL) |
383 reg = CSR_READ_4(sc, ALE_TWSI_CTRL);
388 device_printf(sc->ale_dev,
392 device_printf(sc->ale_dev,
396 ea[0] = CSR_READ_4(sc, ALE_PAR0);
397 ea[1] = CSR_READ_4(sc, ALE_PAR1);
398 sc->ale_eaddr[0] = (ea[1] >> 8) & 0xFF;
399 sc->ale_eaddr[1] = (ea[1] >> 0) & 0xFF;
400 sc->ale_eaddr[2] = (ea[0] >> 24) & 0xFF;
401 sc->ale_eaddr[3] = (ea[0] >> 16) & 0xFF;
402 sc->ale_eaddr[4] = (ea[0] >> 8) & 0xFF;
403 sc->ale_eaddr[5] = (ea[0] >> 0) & 0xFF;
407 ale_phy_reset(struct ale_softc *sc)
411 CSR_WRITE_2(sc, ALE_GPHY_CTRL,
415 CSR_WRITE_2(sc, ALE_GPHY_CTRL,
424 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
426 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
429 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
431 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
434 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
436 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
439 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
441 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
444 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
446 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
457 struct ale_softc *sc;
464 sc = device_get_softc(dev);
465 sc->ale_dev = dev;
467 mtx_init(&sc->ale_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
469 callout_init_mtx(&sc->ale_tick_ch, &sc->ale_mtx, 0);
470 TASK_INIT(&sc->ale_int_task, 0, ale_int_task, sc);
474 sc->ale_res_spec = ale_res_spec_mem;
475 sc->ale_irq_spec = ale_irq_spec_legacy;
476 error = bus_alloc_resources(dev, sc->ale_res_spec, sc->ale_res);
483 sc->ale_phyaddr = ALE_PHY_ADDR;
486 ale_phy_reset(sc);
489 ale_reset(sc);
492 sc->ale_rev = pci_get_revid(dev);
493 if (sc->ale_rev >= 0xF0) {
495 sc->ale_flags |= ALE_FLAG_FASTETHER;
497 if ((CSR_READ_4(sc, ALE_PHY_STATUS) & PHY_STATUS_100M) != 0) {
499 sc->ale_flags |= ALE_FLAG_JUMBO;
502 sc->ale_flags |= ALE_FLAG_FASTETHER;
510 sc->ale_flags |= ALE_FLAG_TXCSUM_BUG;
515 sc->ale_flags |= ALE_FLAG_RXCSUM_BUG;
522 sc->ale_flags |= ALE_FLAG_TXCMB_BUG;
523 sc->ale_chip_rev = CSR_READ_4(sc, ALE_MASTER_CFG) >>
527 sc->ale_rev);
529 sc->ale_chip_rev);
531 txf_len = CSR_READ_4(sc, ALE_SRAM_TX_FIFO_LEN);
532 rxf_len = CSR_READ_4(sc, ALE_SRAM_RX_FIFO_LEN);
537 if (sc->ale_chip_rev == 0xFFFF || txf_len == 0xFFFFFFFF ||
540 "%u Rx FIFO -- not initialized?\n", sc->ale_chip_rev,
562 sc->ale_flags |= ALE_FLAG_MSIX;
563 sc->ale_irq_spec = ale_irq_spec_msix;
567 if (msi_disable == 0 && (sc->ale_flags & ALE_FLAG_MSIX) == 0 &&
573 sc->ale_flags |= ALE_FLAG_MSI;
574 sc->ale_irq_spec = ale_irq_spec_msi;
580 error = bus_alloc_resources(dev, sc->ale_irq_spec, sc->ale_irq);
588 sc->ale_flags |= ALE_FLAG_PCIE;
591 sc->ale_dma_rd_burst = ((burst >> 12) & 0x07) <<
594 sc->ale_dma_wr_burst = ((burst >> 5) & 0x07) <<
603 sc->ale_dma_rd_burst = DMA_CFG_RD_BURST_128;
604 sc->ale_dma_wr_burst = DMA_CFG_WR_BURST_128;
608 ale_sysctl_node(sc);
610 if ((error = ale_dma_alloc(sc)) != 0)
614 ale_get_macaddr(sc);
616 ifp = sc->ale_ifp = if_alloc(IFT_ETHER);
623 ifp->if_softc = sc;
635 sc->ale_flags |= ALE_FLAG_PMCAP;
641 error = mii_attach(dev, &sc->ale_miibus, ifp, ale_mediachange,
642 ale_mediastatus, BMSR_DEFCAPMASK, sc->ale_phyaddr, MII_OFFSET_ANY,
649 ether_ifattach(ifp, sc->ale_eaddr);
668 sc->ale_tq = taskqueue_create_fast("ale_taskq", M_WAITOK,
669 taskqueue_thread_enqueue, &sc->ale_tq);
670 if (sc->ale_tq == NULL) {
676 taskqueue_start_threads(&sc->ale_tq, 1, PI_NET, "%s taskq",
677 device_get_nameunit(sc->ale_dev));
679 if ((sc->ale_flags & ALE_FLAG_MSIX) != 0)
681 else if ((sc->ale_flags & ALE_FLAG_MSI) != 0)
686 error = bus_setup_intr(dev, sc->ale_irq[i],
687 INTR_TYPE_NET | INTR_MPSAFE, ale_intr, NULL, sc,
688 &sc->ale_intrhand[i]);
694 taskqueue_free(sc->ale_tq);
695 sc->ale_tq = NULL;
710 struct ale_softc *sc;
714 sc = device_get_softc(dev);
716 ifp = sc->ale_ifp;
719 ALE_LOCK(sc);
720 ale_stop(sc);
721 ALE_UNLOCK(sc);
722 callout_drain(&sc->ale_tick_ch);
723 taskqueue_drain(sc->ale_tq, &sc->ale_int_task);
726 if (sc->ale_tq != NULL) {
727 taskqueue_drain(sc->ale_tq, &sc->ale_int_task);
728 taskqueue_free(sc->ale_tq);
729 sc->ale_tq = NULL;
732 if (sc->ale_miibus != NULL) {
733 device_delete_child(dev, sc->ale_miibus);
734 sc->ale_miibus = NULL;
737 ale_dma_free(sc);
741 sc->ale_ifp = NULL;
744 if ((sc->ale_flags & ALE_FLAG_MSIX) != 0)
746 else if ((sc->ale_flags & ALE_FLAG_MSI) != 0)
751 if (sc->ale_intrhand[i] != NULL) {
752 bus_teardown_intr(dev, sc->ale_irq[i],
753 sc->ale_intrhand[i]);
754 sc->ale_intrhand[i] = NULL;
758 bus_release_resources(dev, sc->ale_irq_spec, sc->ale_irq);
759 if ((sc->ale_flags & (ALE_FLAG_MSI | ALE_FLAG_MSIX)) != 0)
761 bus_release_resources(dev, sc->ale_res_spec, sc->ale_res);
762 mtx_destroy(&sc->ale_mtx);
782 ale_sysctl_node(struct ale_softc *sc)
790 stats = &sc->ale_stats;
791 ctx = device_get_sysctl_ctx(sc->ale_dev);
792 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->ale_dev));
795 CTLTYPE_INT | CTLFLAG_RW, &sc->ale_int_rx_mod, 0,
798 CTLTYPE_INT | CTLFLAG_RW, &sc->ale_int_tx_mod, 0,
801 sc->ale_int_rx_mod = ALE_IM_RX_TIMER_DEFAULT;
802 error = resource_int_value(device_get_name(sc->ale_dev),
803 device_get_unit(sc->ale_dev), "int_rx_mod", &sc->ale_int_rx_mod);
805 if (sc->ale_int_rx_mod < ALE_IM_TIMER_MIN ||
806 sc->ale_int_rx_mod > ALE_IM_TIMER_MAX) {
807 device_printf(sc->ale_dev, "int_rx_mod value out of "
810 sc->ale_int_rx_mod = ALE_IM_RX_TIMER_DEFAULT;
813 sc->ale_int_tx_mod = ALE_IM_TX_TIMER_DEFAULT;
814 error = resource_int_value(device_get_name(sc->ale_dev),
815 device_get_unit(sc->ale_dev), "int_tx_mod", &sc->ale_int_tx_mod);
817 if (sc->ale_int_tx_mod < ALE_IM_TIMER_MIN ||
818 sc->ale_int_tx_mod > ALE_IM_TIMER_MAX) {
819 device_printf(sc->ale_dev, "int_tx_mod value out of "
822 sc->ale_int_tx_mod = ALE_IM_TX_TIMER_DEFAULT;
826 CTLTYPE_INT | CTLFLAG_RW, &sc->ale_process_limit, 0,
830 sc->ale_process_limit = ALE_PROC_DEFAULT;
831 error = resource_int_value(device_get_name(sc->ale_dev),
832 device_get_unit(sc->ale_dev), "process_limit",
833 &sc->ale_process_limit);
835 if (sc->ale_process_limit < ALE_PROC_MIN ||
836 sc->ale_process_limit > ALE_PROC_MAX) {
837 device_printf(sc->ale_dev,
840 sc->ale_process_limit = ALE_PROC_DEFAULT;
991 ale_check_boundary(struct ale_softc *sc)
996 rx_page_end[0] = sc->ale_cdata.ale_rx_page[0].page_paddr +
997 sc->ale_pagesize;
998 rx_page_end[1] = sc->ale_cdata.ale_rx_page[1].page_paddr +
999 sc->ale_pagesize;
1000 tx_ring_end = sc->ale_cdata.ale_tx_ring_paddr + ALE_TX_RING_SZ;
1001 tx_cmb_end = sc->ale_cdata.ale_tx_cmb_paddr + ALE_TX_CMB_SZ;
1002 rx_cmb_end[0] = sc->ale_cdata.ale_rx_page[0].cmb_paddr + ALE_RX_CMB_SZ;
1003 rx_cmb_end[1] = sc->ale_cdata.ale_rx_page[1].cmb_paddr + ALE_RX_CMB_SZ;
1006 ALE_ADDR_HI(sc->ale_cdata.ale_tx_ring_paddr)) ||
1008 ALE_ADDR_HI(sc->ale_cdata.ale_rx_page[0].page_paddr)) ||
1010 ALE_ADDR_HI(sc->ale_cdata.ale_rx_page[1].page_paddr)) ||
1012 ALE_ADDR_HI(sc->ale_cdata.ale_tx_cmb_paddr)) ||
1014 ALE_ADDR_HI(sc->ale_cdata.ale_rx_page[0].cmb_paddr)) ||
1016 ALE_ADDR_HI(sc->ale_cdata.ale_rx_page[1].cmb_paddr)))
1030 ale_dma_alloc(struct ale_softc *sc)
1037 if ((sc->ale_flags & ALE_FLAG_JUMBO) != 0)
1041 sc->ale_pagesize = roundup(guard_size + ALE_RX_PAGE_SZ,
1047 bus_get_dma_tag(sc->ale_dev), /* parent */
1057 &sc->ale_cdata.ale_parent_tag);
1059 device_printf(sc->ale_dev,
1066 sc->ale_cdata.ale_parent_tag, /* parent */
1076 &sc->ale_cdata.ale_tx_ring_tag);
1078 device_printf(sc->ale_dev,
1086 sc->ale_cdata.ale_parent_tag, /* parent */
1091 sc->ale_pagesize, /* maxsize */
1093 sc->ale_pagesize, /* maxsegsize */
1096 &sc->ale_cdata.ale_rx_page[i].page_tag);
1098 device_printf(sc->ale_dev,
1106 sc->ale_cdata.ale_parent_tag, /* parent */
1116 &sc->ale_cdata.ale_tx_cmb_tag);
1118 device_printf(sc->ale_dev,
1126 sc->ale_cdata.ale_parent_tag, /* parent */
1136 &sc->ale_cdata.ale_rx_page[i].cmb_tag);
1138 device_printf(sc->ale_dev,
1145 error = bus_dmamem_alloc(sc->ale_cdata.ale_tx_ring_tag,
1146 (void **)&sc->ale_cdata.ale_tx_ring,
1148 &sc->ale_cdata.ale_tx_ring_map);
1150 device_printf(sc->ale_dev,
1155 error = bus_dmamap_load(sc->ale_cdata.ale_tx_ring_tag,
1156 sc->ale_cdata.ale_tx_ring_map, sc->ale_cdata.ale_tx_ring,
1159 device_printf(sc->ale_dev,
1163 sc->ale_cdata.ale_tx_ring_paddr = ctx.ale_busaddr;
1167 error = bus_dmamem_alloc(sc->ale_cdata.ale_rx_page[i].page_tag,
1168 (void **)&sc->ale_cdata.ale_rx_page[i].page_addr,
1170 &sc->ale_cdata.ale_rx_page[i].page_map);
1172 device_printf(sc->ale_dev,
1178 error = bus_dmamap_load(sc->ale_cdata.ale_rx_page[i].page_tag,
1179 sc->ale_cdata.ale_rx_page[i].page_map,
1180 sc->ale_cdata.ale_rx_page[i].page_addr,
1181 sc->ale_pagesize, ale_dmamap_cb, &ctx, 0);
1183 device_printf(sc->ale_dev,
1188 sc->ale_cdata.ale_rx_page[i].page_paddr = ctx.ale_busaddr;
1192 error = bus_dmamem_alloc(sc->ale_cdata.ale_tx_cmb_tag,
1193 (void **)&sc->ale_cdata.ale_tx_cmb,
1195 &sc->ale_cdata.ale_tx_cmb_map);
1197 device_printf(sc->ale_dev,
1202 error = bus_dmamap_load(sc->ale_cdata.ale_tx_cmb_tag,
1203 sc->ale_cdata.ale_tx_cmb_map, sc->ale_cdata.ale_tx_cmb,
1206 device_printf(sc->ale_dev,
1210 sc->ale_cdata.ale_tx_cmb_paddr = ctx.ale_busaddr;
1214 error = bus_dmamem_alloc(sc->ale_cdata.ale_rx_page[i].cmb_tag,
1215 (void **)&sc->ale_cdata.ale_rx_page[i].cmb_addr,
1217 &sc->ale_cdata.ale_rx_page[i].cmb_map);
1219 device_printf(sc->ale_dev, "could not allocate "
1224 error = bus_dmamap_load(sc->ale_cdata.ale_rx_page[i].cmb_tag,
1225 sc->ale_cdata.ale_rx_page[i].cmb_map,
1226 sc->ale_cdata.ale_rx_page[i].cmb_addr,
1229 device_printf(sc->ale_dev, "could not load DMA'able "
1233 sc->ale_cdata.ale_rx_page[i].cmb_paddr = ctx.ale_busaddr;
1241 (error = ale_check_boundary(sc)) != 0) {
1242 device_printf(sc->ale_dev, "4GB boundary crossed, "
1244 ale_dma_free(sc);
1261 bus_get_dma_tag(sc->ale_dev), /* parent */
1271 &sc->ale_cdata.ale_buffer_tag);
1273 device_printf(sc->ale_dev,
1280 sc->ale_cdata.ale_buffer_tag, /* parent */
1290 &sc->ale_cdata.ale_tx_tag);
1292 device_printf(sc->ale_dev, "could not create Tx DMA tag.\n");
1298 txd = &sc->ale_cdata.ale_txdesc[i];
1301 error = bus_dmamap_create(sc->ale_cdata.ale_tx_tag, 0,
1304 device_printf(sc->ale_dev,
1315 ale_dma_free(struct ale_softc *sc)
1321 if (sc->ale_cdata.ale_tx_tag != NULL) {
1323 txd = &sc->ale_cdata.ale_txdesc[i];
1325 bus_dmamap_destroy(sc->ale_cdata.ale_tx_tag,
1330 bus_dma_tag_destroy(sc->ale_cdata.ale_tx_tag);
1331 sc->ale_cdata.ale_tx_tag = NULL;
1334 if (sc->ale_cdata.ale_tx_ring_tag != NULL) {
1335 if (sc->ale_cdata.ale_tx_ring_paddr != 0)
1336 bus_dmamap_unload(sc->ale_cdata.ale_tx_ring_tag,
1337 sc->ale_cdata.ale_tx_ring_map);
1338 if (sc->ale_cdata.ale_tx_ring != NULL)
1339 bus_dmamem_free(sc->ale_cdata.ale_tx_ring_tag,
1340 sc->ale_cdata.ale_tx_ring,
1341 sc->ale_cdata.ale_tx_ring_map);
1342 sc->ale_cdata.ale_tx_ring_paddr = 0;
1343 sc->ale_cdata.ale_tx_ring = NULL;
1344 bus_dma_tag_destroy(sc->ale_cdata.ale_tx_ring_tag);
1345 sc->ale_cdata.ale_tx_ring_tag = NULL;
1349 if (sc->ale_cdata.ale_rx_page[i].page_tag != NULL) {
1350 if (sc->ale_cdata.ale_rx_page[i].page_paddr != 0)
1352 sc->ale_cdata.ale_rx_page[i].page_tag,
1353 sc->ale_cdata.ale_rx_page[i].page_map);
1354 if (sc->ale_cdata.ale_rx_page[i].page_addr != NULL)
1356 sc->ale_cdata.ale_rx_page[i].page_tag,
1357 sc->ale_cdata.ale_rx_page[i].page_addr,
1358 sc->ale_cdata.ale_rx_page[i].page_map);
1359 sc->ale_cdata.ale_rx_page[i].page_paddr = 0;
1360 sc->ale_cdata.ale_rx_page[i].page_addr = NULL;
1362 sc->ale_cdata.ale_rx_page[i].page_tag);
1363 sc->ale_cdata.ale_rx_page[i].page_tag = NULL;
1368 if (sc->ale_cdata.ale_rx_page[i].cmb_tag != NULL) {
1369 if (sc->ale_cdata.ale_rx_page[i].cmb_paddr != 0)
1371 sc->ale_cdata.ale_rx_page[i].cmb_tag,
1372 sc->ale_cdata.ale_rx_page[i].cmb_map);
1373 if (sc->ale_cdata.ale_rx_page[i].cmb_addr != NULL)
1375 sc->ale_cdata.ale_rx_page[i].cmb_tag,
1376 sc->ale_cdata.ale_rx_page[i].cmb_addr,
1377 sc->ale_cdata.ale_rx_page[i].cmb_map);
1378 sc->ale_cdata.ale_rx_page[i].cmb_paddr = 0;
1379 sc->ale_cdata.ale_rx_page[i].cmb_addr = NULL;
1381 sc->ale_cdata.ale_rx_page[i].cmb_tag);
1382 sc->ale_cdata.ale_rx_page[i].cmb_tag = NULL;
1386 if (sc->ale_cdata.ale_tx_cmb_tag != NULL) {
1387 if (sc->ale_cdata.ale_tx_cmb_paddr != 0)
1388 bus_dmamap_unload(sc->ale_cdata.ale_tx_cmb_tag,
1389 sc->ale_cdata.ale_tx_cmb_map);
1390 if (sc->ale_cdata.ale_tx_cmb != NULL)
1391 bus_dmamem_free(sc->ale_cdata.ale_tx_cmb_tag,
1392 sc->ale_cdata.ale_tx_cmb,
1393 sc->ale_cdata.ale_tx_cmb_map);
1394 sc->ale_cdata.ale_tx_cmb_paddr = 0;
1395 sc->ale_cdata.ale_tx_cmb = NULL;
1396 bus_dma_tag_destroy(sc->ale_cdata.ale_tx_cmb_tag);
1397 sc->ale_cdata.ale_tx_cmb_tag = NULL;
1399 if (sc->ale_cdata.ale_buffer_tag != NULL) {
1400 bus_dma_tag_destroy(sc->ale_cdata.ale_buffer_tag);
1401 sc->ale_cdata.ale_buffer_tag = NULL;
1403 if (sc->ale_cdata.ale_parent_tag != NULL) {
1404 bus_dma_tag_destroy(sc->ale_cdata.ale_parent_tag);
1405 sc->ale_cdata.ale_parent_tag = NULL;
1433 ale_setlinkspeed(struct ale_softc *sc)
1438 mii = device_get_softc(sc->ale_miibus);
1454 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr, MII_100T2CR, 0);
1455 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
1457 ale_miibus_writereg(sc->ale_dev, sc->ale_phyaddr,
1472 ale_mac_config(sc);
1478 ALE_UNLOCK(sc);
1480 ALE_LOCK(sc);
1483 device_printf(sc->ale_dev,
1492 ale_mac_config(sc);
1496 ale_setwol(struct ale_softc *sc)
1503 ALE_LOCK_ASSERT(sc);
1505 if (pci_find_cap(sc->ale_dev, PCIY_PMG, &pmc) != 0) {
1507 CSR_WRITE_4(sc, ALE_WOL_CFG, 0);
1508 reg = CSR_READ_4(sc, ALE_PCIE_PHYMISC);
1510 CSR_WRITE_4(sc, ALE_PCIE_PHYMISC, reg);
1512 CSR_WRITE_2(sc, ALE_GPHY_CTRL,
1520 ifp = sc->ale_ifp;
1522 if ((sc->ale_flags & ALE_FLAG_FASTETHER) == 0)
1523 ale_setlinkspeed(sc);
1529 CSR_WRITE_4(sc, ALE_WOL_CFG, pmcs);
1530 reg = CSR_READ_4(sc, ALE_MAC_CFG);
1537 CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
1541 reg = CSR_READ_4(sc, ALE_PCIE_PHYMISC);
1543 CSR_WRITE_4(sc, ALE_PCIE_PHYMISC, reg);
1544 CSR_WRITE_2(sc, ALE_GPHY_CTRL,
1551 pmstat = pci_read_config(sc->ale_dev, pmc + PCIR_POWER_STATUS, 2);
1555 pci_write_config(sc->ale_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
1561 struct ale_softc *sc;
1563 sc = device_get_softc(dev);
1565 ALE_LOCK(sc);
1566 ale_stop(sc);
1567 ale_setwol(sc);
1568 ALE_UNLOCK(sc);
1576 struct ale_softc *sc;
1581 sc = device_get_softc(dev);
1583 ALE_LOCK(sc);
1584 if (pci_find_cap(sc->ale_dev, PCIY_PMG, &pmc) == 0) {
1586 pmstat = pci_read_config(sc->ale_dev,
1590 pci_write_config(sc->ale_dev,
1595 ale_phy_reset(sc);
1596 ifp = sc->ale_ifp;
1599 ale_init_locked(sc);
1601 ALE_UNLOCK(sc);
1607 ale_encap(struct ale_softc *sc, struct mbuf **m_head)
1619 ALE_LOCK_ASSERT(sc);
1656 if ((sc->ale_flags & ALE_FLAG_TXCSUM_BUG) != 0 &&
1737 si = prod = sc->ale_cdata.ale_tx_prod;
1738 txd = &sc->ale_cdata.ale_txdesc[prod];
1742 error = bus_dmamap_load_mbuf_sg(sc->ale_cdata.ale_tx_tag, map,
1752 error = bus_dmamap_load_mbuf_sg(sc->ale_cdata.ale_tx_tag, map,
1768 if (sc->ale_cdata.ale_tx_cnt + nsegs >= ALE_TX_RING_CNT - 3) {
1769 bus_dmamap_unload(sc->ale_cdata.ale_tx_tag, map);
1772 bus_dmamap_sync(sc->ale_cdata.ale_tx_tag, map, BUS_DMASYNC_PREWRITE);
1827 desc = &sc->ale_cdata.ale_tx_ring[prod];
1831 sc->ale_cdata.ale_tx_cnt++;
1835 desc = &sc->ale_cdata.ale_tx_ring[prod];
1840 sc->ale_cdata.ale_tx_cnt++;
1846 desc = &sc->ale_cdata.ale_tx_ring[prod];
1850 sc->ale_cdata.ale_tx_cnt++;
1854 sc->ale_cdata.ale_tx_prod = prod;
1857 desc = &sc->ale_cdata.ale_tx_ring[si];
1863 desc = &sc->ale_cdata.ale_tx_ring[prod];
1867 txd = &sc->ale_cdata.ale_txdesc[prod];
1874 bus_dmamap_sync(sc->ale_cdata.ale_tx_ring_tag,
1875 sc->ale_cdata.ale_tx_ring_map,
1884 struct ale_softc *sc;
1886 sc = ifp->if_softc;
1887 ALE_LOCK(sc);
1889 ALE_UNLOCK(sc);
1895 struct ale_softc *sc;
1899 sc = ifp->if_softc;
1901 ALE_LOCK_ASSERT(sc);
1904 if (sc->ale_cdata.ale_tx_cnt >= ALE_TX_DESC_HIWAT)
1905 ale_txeof(sc);
1908 IFF_DRV_RUNNING || (sc->ale_flags & ALE_FLAG_LINK) == 0)
1920 if (ale_encap(sc, &m_head)) {
1938 CSR_WRITE_4(sc, ALE_MBOX_TPD_PROD_IDX,
1939 sc->ale_cdata.ale_tx_prod);
1941 sc->ale_watchdog_timer = ALE_TX_TIMEOUT;
1946 ale_watchdog(struct ale_softc *sc)
1950 ALE_LOCK_ASSERT(sc);
1952 if (sc->ale_watchdog_timer == 0 || --sc->ale_watchdog_timer)
1955 ifp = sc->ale_ifp;
1956 if ((sc->ale_flags & ALE_FLAG_LINK) == 0) {
1957 if_printf(sc->ale_ifp, "watchdog timeout (lost link)\n");
1960 ale_init_locked(sc);
1963 if_printf(sc->ale_ifp, "watchdog timeout -- resetting\n");
1966 ale_init_locked(sc);
1974 struct ale_softc *sc;
1979 sc = ifp->if_softc;
1985 ((sc->ale_flags & ALE_FLAG_JUMBO) == 0 &&
1989 ALE_LOCK(sc);
1993 ale_init_locked(sc);
1995 ALE_UNLOCK(sc);
1999 ALE_LOCK(sc);
2002 if (((ifp->if_flags ^ sc->ale_if_flags)
2004 ale_rxfilter(sc);
2006 ale_init_locked(sc);
2010 ale_stop(sc);
2012 sc->ale_if_flags = ifp->if_flags;
2013 ALE_UNLOCK(sc);
2017 ALE_LOCK(sc);
2019 ale_rxfilter(sc);
2020 ALE_UNLOCK(sc);
2024 mii = device_get_softc(sc->ale_miibus);
2028 ALE_LOCK(sc);
2067 ale_rxvlan(sc);
2069 ALE_UNLOCK(sc);
2081 ale_mac_config(struct ale_softc *sc)
2086 ALE_LOCK_ASSERT(sc);
2088 mii = device_get_softc(sc->ale_miibus);
2089 reg = CSR_READ_4(sc, ALE_MAC_CFG);
2109 CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
2113 ale_stats_clear(struct ale_softc *sc)
2120 CSR_READ_4(sc, ALE_RX_MIB_BASE + i);
2125 CSR_READ_4(sc, ALE_TX_MIB_BASE + i);
2131 ale_stats_update(struct ale_softc *sc)
2139 ALE_LOCK_ASSERT(sc);
2141 ifp = sc->ale_ifp;
2142 stat = &sc->ale_stats;
2147 *reg = CSR_READ_4(sc, ALE_RX_MIB_BASE + i);
2152 *reg = CSR_READ_4(sc, ALE_TX_MIB_BASE + i);
2231 struct ale_softc *sc;
2234 sc = (struct ale_softc *)arg;
2236 status = CSR_READ_4(sc, ALE_INTR_STATUS);
2240 CSR_WRITE_4(sc, ALE_INTR_STATUS, INTR_DIS_INT);
2241 taskqueue_enqueue(sc->ale_tq, &sc->ale_int_task);
2249 struct ale_softc *sc;
2254 sc = (struct ale_softc *)arg;
2256 status = CSR_READ_4(sc, ALE_INTR_STATUS);
2257 ALE_LOCK(sc);
2258 if (sc->ale_morework != 0)
2264 CSR_WRITE_4(sc, ALE_INTR_STATUS, status | INTR_DIS_INT);
2266 ifp = sc->ale_ifp;
2269 more = ale_rxeof(sc, sc->ale_process_limit);
2271 sc->ale_morework = 1;
2273 sc->ale_stats.reset_brk_seq++;
2275 ale_init_locked(sc);
2276 ALE_UNLOCK(sc);
2282 device_printf(sc->ale_dev,
2285 device_printf(sc->ale_dev,
2288 ale_init_locked(sc);
2289 ALE_UNLOCK(sc);
2297 (CSR_READ_4(sc, ALE_INTR_STATUS) & ALE_INTRS) != 0) {
2298 ALE_UNLOCK(sc);
2299 taskqueue_enqueue(sc->ale_tq, &sc->ale_int_task);
2304 ALE_UNLOCK(sc);
2307 CSR_WRITE_4(sc, ALE_INTR_STATUS, 0x7FFFFFFF);
2311 ale_txeof(struct ale_softc *sc)
2318 ALE_LOCK_ASSERT(sc);
2320 ifp = sc->ale_ifp;
2322 if (sc->ale_cdata.ale_tx_cnt == 0)
2325 bus_dmamap_sync(sc->ale_cdata.ale_tx_ring_tag,
2326 sc->ale_cdata.ale_tx_ring_map,
2328 if ((sc->ale_flags & ALE_FLAG_TXCMB_BUG) == 0) {
2329 bus_dmamap_sync(sc->ale_cdata.ale_tx_cmb_tag,
2330 sc->ale_cdata.ale_tx_cmb_map,
2332 prod = *sc->ale_cdata.ale_tx_cmb & TPD_CNT_MASK;
2334 prod = CSR_READ_2(sc, ALE_TPD_CONS_IDX);
2335 cons = sc->ale_cdata.ale_tx_cons;
2342 if (sc->ale_cdata.ale_tx_cnt <= 0)
2346 sc->ale_cdata.ale_tx_cnt--;
2347 txd = &sc->ale_cdata.ale_txdesc[cons];
2350 bus_dmamap_sync(sc->ale_cdata.ale_tx_tag,
2352 bus_dmamap_unload(sc->ale_cdata.ale_tx_tag,
2360 sc->ale_cdata.ale_tx_cons = cons;
2365 if (sc->ale_cdata.ale_tx_cnt == 0)
2366 sc->ale_watchdog_timer = 0;
2371 ale_rx_update_page(struct ale_softc *sc, struct ale_rx_page **page,
2389 CSR_WRITE_1(sc, ALE_RXF0_PAGE0 + sc->ale_cdata.ale_rx_curp,
2392 sc->ale_cdata.ale_rx_curp ^= 1;
2394 &sc->ale_cdata.ale_rx_page[sc->ale_cdata.ale_rx_curp];
2418 ale_rxcsum(struct ale_softc *sc, struct mbuf *m, uint32_t status)
2424 ifp = sc->ale_ifp;
2429 if ((sc->ale_flags & ALE_FLAG_RXCSUM_BUG) == 0) {
2464 ale_rxeof(struct ale_softc *sc, int count)
2473 ifp = sc->ale_ifp;
2474 rx_page = &sc->ale_cdata.ale_rx_page[sc->ale_cdata.ale_rx_curp];
2494 if (sc->ale_cdata.ale_rx_seqno != seqno) {
2508 device_printf(sc->ale_dev,
2511 sc->ale_cdata.ale_rx_seqno);
2515 sc->ale_cdata.ale_rx_seqno++;
2531 ale_rx_update_page(sc, &rx_page, length, &prod);
2548 ale_rx_update_page(sc, &rx_page, length, &prod);
2553 ale_rxcsum(sc, m, status);
2562 ALE_UNLOCK(sc);
2564 ALE_LOCK(sc);
2566 ale_rx_update_page(sc, &rx_page, length, &prod);
2575 struct ale_softc *sc;
2578 sc = (struct ale_softc *)arg;
2580 ALE_LOCK_ASSERT(sc);
2582 mii = device_get_softc(sc->ale_miibus);
2584 ale_stats_update(sc);
2590 ale_txeof(sc);
2591 ale_watchdog(sc);
2592 callout_reset(&sc->ale_tick_ch, hz, ale_tick, sc);
2596 ale_reset(struct ale_softc *sc)
2602 CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);
2604 CSR_WRITE_4(sc, ALE_MASTER_CFG, MASTER_RESET);
2607 if ((CSR_READ_4(sc, ALE_MASTER_CFG) & MASTER_RESET) == 0)
2611 device_printf(sc->ale_dev, "master reset timeout!\n");
2614 if ((reg = CSR_READ_4(sc, ALE_IDLE_STATUS)) == 0)
2620 device_printf(sc->ale_dev, "reset timeout(0x%08x)!\n", reg);
2626 struct ale_softc *sc;
2628 sc = (struct ale_softc *)xsc;
2629 ALE_LOCK(sc);
2630 ale_init_locked(sc);
2631 ALE_UNLOCK(sc);
2635 ale_init_locked(struct ale_softc *sc)
2643 ALE_LOCK_ASSERT(sc);
2645 ifp = sc->ale_ifp;
2646 mii = device_get_softc(sc->ale_miibus);
2653 ale_stop(sc);
2657 ale_reset(sc);
2659 ale_init_rx_pages(sc);
2660 ale_init_tx_ring(sc);
2664 CSR_WRITE_4(sc, ALE_PAR0,
2666 CSR_WRITE_4(sc, ALE_PAR1, eaddr[0] << 8 | eaddr[1]);
2671 CSR_READ_4(sc, ALE_WOL_CFG);
2672 CSR_WRITE_4(sc, ALE_WOL_CFG, 0);
2677 paddr = sc->ale_cdata.ale_tx_ring_paddr;
2678 CSR_WRITE_4(sc, ALE_TPD_ADDR_HI, ALE_ADDR_HI(paddr));
2679 CSR_WRITE_4(sc, ALE_TPD_ADDR_LO, ALE_ADDR_LO(paddr));
2680 CSR_WRITE_4(sc, ALE_TPD_CNT,
2683 paddr = sc->ale_cdata.ale_rx_page[0].page_paddr;
2684 CSR_WRITE_4(sc, ALE_RXF0_PAGE0_ADDR_LO, ALE_ADDR_LO(paddr));
2685 paddr = sc->ale_cdata.ale_rx_page[1].page_paddr;
2686 CSR_WRITE_4(sc, ALE_RXF0_PAGE1_ADDR_LO, ALE_ADDR_LO(paddr));
2688 paddr = sc->ale_cdata.ale_tx_cmb_paddr;
2689 CSR_WRITE_4(sc, ALE_TX_CMB_ADDR_LO, ALE_ADDR_LO(paddr));
2690 paddr = sc->ale_cdata.ale_rx_page[0].cmb_paddr;
2691 CSR_WRITE_4(sc, ALE_RXF0_CMB0_ADDR_LO, ALE_ADDR_LO(paddr));
2692 paddr = sc->ale_cdata.ale_rx_page[1].cmb_paddr;
2693 CSR_WRITE_4(sc, ALE_RXF0_CMB1_ADDR_LO, ALE_ADDR_LO(paddr));
2695 CSR_WRITE_1(sc, ALE_RXF0_PAGE0, RXF_VALID);
2696 CSR_WRITE_1(sc, ALE_RXF0_PAGE1, RXF_VALID);
2703 CSR_WRITE_4(sc, ALE_RXF_PAGE_SIZE, ALE_RX_PAGE_SZ);
2705 CSR_WRITE_4(sc, ALE_DMA_BLOCK, DMA_BLOCK_LOAD);
2708 CSR_WRITE_4(sc, ALE_INT_TRIG_THRESH, (1 << INT_TRIG_RX_THRESH_SHIFT) |
2715 CSR_WRITE_4(sc, ALE_INT_TRIG_TIMER,
2720 reg = ALE_USECS(sc->ale_int_rx_mod) << IM_TIMER_RX_SHIFT;
2721 reg |= ALE_USECS(sc->ale_int_tx_mod) << IM_TIMER_TX_SHIFT;
2722 CSR_WRITE_4(sc, ALE_IM_TIMER, reg);
2723 reg = CSR_READ_4(sc, ALE_MASTER_CFG);
2726 if (ALE_USECS(sc->ale_int_rx_mod) != 0)
2728 if (ALE_USECS(sc->ale_int_tx_mod) != 0)
2730 CSR_WRITE_4(sc, ALE_MASTER_CFG, reg);
2731 CSR_WRITE_2(sc, ALE_INTR_CLR_TIMER, ALE_USECS(1000));
2735 sc->ale_max_frame_size = ETHERMTU;
2737 sc->ale_max_frame_size = ifp->if_mtu;
2738 sc->ale_max_frame_size += ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +
2740 CSR_WRITE_4(sc, ALE_FRAME_SIZE, sc->ale_max_frame_size);
2742 CSR_WRITE_4(sc, ALE_IPG_IFG_CFG,
2748 CSR_WRITE_4(sc, ALE_HDPX_CFG,
2759 if ((sc->ale_flags & ALE_FLAG_JUMBO) != 0) {
2761 reg = sc->ale_max_frame_size;
2763 reg = (sc->ale_max_frame_size * 2) / 3;
2765 reg = sc->ale_max_frame_size / 2;
2766 CSR_WRITE_4(sc, ALE_TX_JUMBO_THRESH,
2771 reg = (128 << (sc->ale_dma_rd_burst >> DMA_CFG_RD_BURST_SHIFT))
2775 CSR_WRITE_4(sc, ALE_TXQ_CFG, reg | TXQ_CFG_ENHANCED_MODE | TXQ_CFG_ENB);
2778 if ((sc->ale_flags & ALE_FLAG_JUMBO) != 0) {
2779 reg = roundup(sc->ale_max_frame_size, RX_JUMBO_THRESH_UNIT);
2780 CSR_WRITE_4(sc, ALE_RX_JUMBO_THRESH,
2785 reg = CSR_READ_4(sc, ALE_SRAM_RX_FIFO_LEN);
2788 CSR_WRITE_4(sc, ALE_RX_FIFO_PAUSE_THRESH,
2796 CSR_WRITE_4(sc, ALE_RSS_IDT_TABLE0, 0);
2797 CSR_WRITE_4(sc, ALE_RSS_CPU, 0);
2800 CSR_WRITE_4(sc, ALE_RXQ_CFG,
2805 if ((sc->ale_flags & ALE_FLAG_TXCMB_BUG) == 0)
2807 CSR_WRITE_4(sc, ALE_DMA_CFG,
2809 sc->ale_dma_rd_burst | reg |
2810 sc->ale_dma_wr_burst | DMA_CFG_RXCMB_ENB |
2822 CSR_WRITE_4(sc, ALE_SMB_STAT_TIMER, ALE_USECS(0));
2824 ale_stats_clear(sc);
2840 if ((sc->ale_flags & ALE_FLAG_FASTETHER) != 0)
2844 CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
2847 ale_rxfilter(sc);
2848 ale_rxvlan(sc);
2851 CSR_WRITE_4(sc, ALE_INTR_MASK, ALE_INTRS);
2852 CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
2853 CSR_WRITE_4(sc, ALE_INTR_STATUS, 0);
2858 sc->ale_flags &= ~ALE_FLAG_LINK;
2862 callout_reset(&sc->ale_tick_ch, hz, ale_tick, sc);
2866 ale_stop(struct ale_softc *sc)
2873 ALE_LOCK_ASSERT(sc);
2877 ifp = sc->ale_ifp;
2879 sc->ale_flags &= ~ALE_FLAG_LINK;
2880 callout_stop(&sc->ale_tick_ch);
2881 sc->ale_watchdog_timer = 0;
2882 ale_stats_update(sc);
2884 CSR_WRITE_4(sc, ALE_INTR_MASK, 0);
2885 CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
2887 reg = CSR_READ_4(sc, ALE_TXQ_CFG);
2889 CSR_WRITE_4(sc, ALE_TXQ_CFG, reg);
2890 reg = CSR_READ_4(sc, ALE_RXQ_CFG);
2892 CSR_WRITE_4(sc, ALE_RXQ_CFG, reg);
2893 reg = CSR_READ_4(sc, ALE_DMA_CFG);
2895 CSR_WRITE_4(sc, ALE_DMA_CFG, reg);
2898 ale_stop_mac(sc);
2900 CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
2906 txd = &sc->ale_cdata.ale_txdesc[i];
2908 bus_dmamap_sync(sc->ale_cdata.ale_tx_tag,
2910 bus_dmamap_unload(sc->ale_cdata.ale_tx_tag,
2919 ale_stop_mac(struct ale_softc *sc)
2924 ALE_LOCK_ASSERT(sc);
2926 reg = CSR_READ_4(sc, ALE_MAC_CFG);
2929 CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
2933 reg = CSR_READ_4(sc, ALE_IDLE_STATUS);
2939 device_printf(sc->ale_dev,
2944 ale_init_tx_ring(struct ale_softc *sc)
2949 ALE_LOCK_ASSERT(sc);
2951 sc->ale_cdata.ale_tx_prod = 0;
2952 sc->ale_cdata.ale_tx_cons = 0;
2953 sc->ale_cdata.ale_tx_cnt = 0;
2955 bzero(sc->ale_cdata.ale_tx_ring, ALE_TX_RING_SZ);
2956 bzero(sc->ale_cdata.ale_tx_cmb, ALE_TX_CMB_SZ);
2958 txd = &sc->ale_cdata.ale_txdesc[i];
2961 *sc->ale_cdata.ale_tx_cmb = 0;
2962 bus_dmamap_sync(sc->ale_cdata.ale_tx_cmb_tag,
2963 sc->ale_cdata.ale_tx_cmb_map,
2965 bus_dmamap_sync(sc->ale_cdata.ale_tx_ring_tag,
2966 sc->ale_cdata.ale_tx_ring_map,
2971 ale_init_rx_pages(struct ale_softc *sc)
2976 ALE_LOCK_ASSERT(sc);
2978 sc->ale_morework = 0;
2979 sc->ale_cdata.ale_rx_seqno = 0;
2980 sc->ale_cdata.ale_rx_curp = 0;
2983 rx_page = &sc->ale_cdata.ale_rx_page[i];
2984 bzero(rx_page->page_addr, sc->ale_pagesize);
2996 ale_rxvlan(struct ale_softc *sc)
3001 ALE_LOCK_ASSERT(sc);
3003 ifp = sc->ale_ifp;
3004 reg = CSR_READ_4(sc, ALE_MAC_CFG);
3008 CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
3012 ale_rxfilter(struct ale_softc *sc)
3020 ALE_LOCK_ASSERT(sc);
3022 ifp = sc->ale_ifp;
3024 rxcfg = CSR_READ_4(sc, ALE_MAC_CFG);
3033 CSR_WRITE_4(sc, ALE_MAR0, 0xFFFFFFFF);
3034 CSR_WRITE_4(sc, ALE_MAR1, 0xFFFFFFFF);
3035 CSR_WRITE_4(sc, ALE_MAC_CFG, rxcfg);
3043 TAILQ_FOREACH(ifma, &sc->ale_ifp->if_multiaddrs, ifma_link) {
3052 CSR_WRITE_4(sc, ALE_MAR0, mchash[0]);
3053 CSR_WRITE_4(sc, ALE_MAR1, mchash[1]);
3054 CSR_WRITE_4(sc, ALE_MAC_CFG, rxcfg);