Lines Matching refs:slot

1160 			endpoint->device->slot);
1523 uint8 slot = XHCI_MAX_SLOTS;
1524 status_t status = EnableSlot(&slot);
1526 TRACE_ERROR("failed to enable slot: %s\n", strerror(status));
1530 if (slot == 0 || slot > fSlotCount) {
1531 TRACE_ERROR("AllocateDevice: bad slot\n");
1535 if (fDevices[slot].slot != 0) {
1536 TRACE_ERROR("AllocateDevice: slot already used\n");
1540 struct xhci_device *device = &fDevices[slot];
1541 device->slot = slot;
1604 _WriteContext(&device->input_ctx->slot.dwslot0, dwslot0);
1606 _WriteContext(&device->input_ctx->slot.dwslot1, SLOT_1_RH_PORT(rhPort));
1615 dwslot2 |= SLOT_2_TT_HUB_SLOT(parenthub->slot);
1618 _WriteContext(&device->input_ctx->slot.dwslot2, dwslot2);
1620 _WriteContext(&device->input_ctx->slot.dwslot3, SLOT_3_SLOT_STATE(0)
1623 TRACE("slot 0x%08" B_PRIx32 " 0x%08" B_PRIx32 " 0x%08" B_PRIx32 " 0x%08" B_PRIx32
1624 "\n", _ReadContext(&device->input_ctx->slot.dwslot0),
1625 _ReadContext(&device->input_ctx->slot.dwslot1),
1626 _ReadContext(&device->input_ctx->slot.dwslot2),
1627 _ReadContext(&device->input_ctx->slot.dwslot3));
1648 // set up slot pointer to device context
1649 fDcba->baseAddress[slot] = device->device_ctx_addr;
1677 if (ConfigureEndpoint(endpoint0, slot, 0, USB_OBJECT_CONTROL_PIPE, false,
1685 status = SetAddress(device->input_ctx_addr, false, slot);
1693 &device->device_ctx->slot.dwslot3));
1697 &device->device_ctx->slot.dwslot3)));
1751 EvaluateContext(device->input_ctx_addr, device->slot);
1777 uint32 dwslot0 = _ReadContext(&device->input_ctx->slot.dwslot0);
1779 _WriteContext(&device->input_ctx->slot.dwslot0, dwslot0);
1780 uint32 dwslot1 = _ReadContext(&device->input_ctx->slot.dwslot1);
1782 _WriteContext(&device->input_ctx->slot.dwslot1, dwslot1);
1784 uint32 dwslot2 = _ReadContext(&device->input_ctx->slot.dwslot2);
1786 _WriteContext(&device->input_ctx->slot.dwslot2, dwslot2);
1812 TRACE("AllocateDevice() port %d slot %d\n", hubPort, slot);
1821 TRACE("FreeDevice() slot %d\n", device->slot);
1834 if (device->slot != 0) {
1835 DisableSlot(device->slot);
1836 fDcba->baseAddress[device->slot] = 0;
1889 uint32 devicedwslot0 = _ReadContext(&device->device_ctx->slot.dwslot0);
1891 uint32 inputdwslot0 = _ReadContext(&device->input_ctx->slot.dwslot0);
1894 _WriteContext(&device->input_ctx->slot.dwslot0, inputdwslot0);
1895 EvaluateContext(device->input_ctx_addr, device->slot);
1922 status_t status = ConfigureEndpoint(endpoint, device->slot, id, pipe->Type(),
1934 ConfigureEndpoint(device->input_ctx_addr, false, device->slot);
1938 &device->device_ctx->slot.dwslot3)));
1992 ConfigureEndpoint(device->input_ctx_addr, false, device->slot);
2112 Ring(endpoint->device->slot, endpoint->id + 1);
2150 XHCI::ConfigureEndpoint(xhci_endpoint* ep, uint8 slot, uint8 number, uint8 type,
2154 struct xhci_device* device = &fDevices[slot];
2548 XHCI::Ring(uint8 slot, uint8 endpoint)
2550 TRACE("Ding Dong! slot:%d endpoint %d\n", slot, endpoint)
2551 if ((slot == 0 && endpoint > 0) || (slot > 0 && endpoint == 0))
2552 panic("Ring() invalid slot/endpoint combination\n");
2553 if (slot > fSlotCount || endpoint >= XHCI_MAX_ENDPOINTS)
2554 panic("Ring() invalid slot or endpoint\n");
2556 WriteDoorReg32(XHCI_DOORBELL(slot), XHCI_DOORBELL_TARGET(endpoint)
2558 ReadDoorReg32(XHCI_DOORBELL(slot));
2624 slot = TRB_3_SLOT_GET(flags);
2626 if (slot > fSlotCount)
2627 TRACE_ERROR("invalid slot\n");
2633 xhci_device *device = &fDevices[slot];
2678 TRACE_ALWAYS("transfer error on slot %" B_PRId8 " endpoint %" B_PRId8
2679 ": %s\n", slot, endpointNumber, xhci_error_string(completionCode));
2862 XHCI::EnableSlot(uint8* slot)
2874 *slot = TRB_3_SLOT_GET(trb.flags);
2875 return *slot != 0 ? B_OK : B_BAD_VALUE;
2880 XHCI::DisableSlot(uint8 slot)
2886 trb.flags = TRB_3_TYPE(TRB_TYPE_DISABLE_SLOT) | TRB_3_SLOT(slot);
2893 XHCI::SetAddress(uint64 inputContext, bool bsr, uint8 slot)
2899 trb.flags = TRB_3_TYPE(TRB_TYPE_ADDRESS_DEVICE) | TRB_3_SLOT(slot);
2909 XHCI::ConfigureEndpoint(uint64 inputContext, bool deconfigure, uint8 slot)
2915 trb.flags = TRB_3_TYPE(TRB_TYPE_CONFIGURE_ENDPOINT) | TRB_3_SLOT(slot);
2925 XHCI::EvaluateContext(uint64 inputContext, uint8 slot)
2931 trb.flags = TRB_3_TYPE(TRB_TYPE_EVALUATE_CONTEXT) | TRB_3_SLOT(slot);
2956 | TRB_3_SLOT(endpoint->device->slot) | TRB_3_ENDPOINT(endpoint->id + 1);
2984 | TRB_3_SLOT(endpoint->device->slot) | TRB_3_ENDPOINT(endpoint->id + 1);
2993 XHCI::SetTRDequeue(uint64 dequeue, uint16 stream, uint8 endpoint, uint8 slot)
3002 | TRB_3_SLOT(slot) | TRB_3_ENDPOINT(endpoint);
3009 XHCI::ResetDevice(uint8 slot)
3015 trb.flags = TRB_3_TYPE(TRB_TYPE_RESET_DEVICE) | TRB_3_SLOT(slot);