Lines Matching defs:bit
53 * function in a 32-bit/64-bit 33/66Mhz bus, or a 64-bit/133Mhz bus.
815 /* Clear the autopoll bit if set, otherwise may trigger PCI errors. */
843 /* Restore the autopoll bit if necessary. */
867 /* Clear the autopoll bit if set, otherwise may trigger PCI errors. */
886 /* Restore the autopoll bit if necessary. */
1541 * 64-bit DMA reads, which can be terminated early and then
1542 * completed later as 32-bit accesses, in combination with
1766 * block. We set the 'ring disabled' bit in the
1851 * Disable all send rings by setting the 'ring disabled' bit
1885 * 'ring diabled' bit in the flags field of all the receive
2507 * address space to 32bit and try again.
2514 "limit DMA address space to 32bit for %s\n", msg);
2883 printf("%u MHz; 32bit\n", clk);
2885 printf("%u MHz; 64bit\n", clk);
3193 * (This bit is not valid on PCI Express controllers.)
3203 * The 40bit DMA bug applies to the 5714/5715 controllers and is
3205 * PCIe to PCI-X bridge in the device. Use 40bit DMA workaround.
4434 * BGE_HCCMODE_ATTN bit of BGE_HCC_MODE,
4435 * BGE_BMANMODE_LOMBUF_ATTN bit of BGE_BMAN_MODE and
4436 * BGE_MODECTL_FLOWCTL_ATTN_INTR bit of BGE_MODE_CTL.
4662 /* Calculate header length, incl. TCP/IP options, in 32 bit units. */
5428 bge_stop_block(struct bge_softc *sc, bus_size_t reg, uint32_t bit)
5432 BGE_CLRBIT(sc, reg, bit);
5435 if ((CSR_READ_4(sc, reg) & bit) == 0)
5669 * Some broken BCM chips have BGE_STATFLAG_LINKSTATE_CHANGED bit