Lines Matching refs:v1
309 U32 v1 = seed + PRIME32_1 + PRIME32_2;
315 v1 = XXH32_round(v1, XXH_get32bits(p)); p+=4;
321 h32 = XXH_rotl32(v1, 1) + XXH_rotl32(v2, 7) + XXH_rotl32(v3, 12) + XXH_rotl32(v4, 18);
409 U64 v1 = seed + PRIME64_1 + PRIME64_2;
415 v1 = XXH64_round(v1, XXH_get64bits(p)); p+=8;
421 h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
422 h64 = XXH64_mergeRound(h64, v1);
520 state.v1 = seed + PRIME32_1 + PRIME32_2;
533 state.v1 = seed + PRIME64_1 + PRIME64_2;
563 state->v1 = XXH32_round(state->v1, XXH_readLE32(p32, endian)); p32++;
574 U32 v1 = state->v1;
580 v1 = XXH32_round(v1, XXH_readLE32(p, endian)); p+=4;
586 state->v1 = v1;
619 h32 = XXH_rotl32(state->v1, 1) + XXH_rotl32(state->v2, 7) + XXH_rotl32(state->v3, 12) + XXH_rotl32(state->v4, 18);
683 state->v1 = XXH64_round(state->v1, XXH_readLE64(state->mem64+0, endian));
693 U64 v1 = state->v1;
699 v1 = XXH64_round(v1, XXH_readLE64(p, endian)); p+=8;
705 state->v1 = v1;
738 U64 const v1 = state->v1;
743 h64 = XXH_rotl64(v1, 1) + XXH_rotl64(v2, 7) + XXH_rotl64(v3, 12) + XXH_rotl64(v4, 18);
744 h64 = XXH64_mergeRound(h64, v1);