Lines Matching refs:RegUses
289 // Update RegUses. The data structure is not optimized for this purpose;
384 const RegUseTracker &RegUses) const;
580 const RegUseTracker &RegUses) const {
582 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
585 if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
1564 /// Recompute the Regs field, and update RegUses.
1565 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1577 RegUses.dropRegister(S, LUIdx);
1934 RegUseTracker RegUses;
2598 // Update RegUses.
2599 RegUses.swapAndDropUse(LUIdx, Uses.size());
3363 /// Note which registers are used by the given formula, updating RegUses.
3366 RegUses.countRegister(F.ScaledReg, LUIdx);
3368 RegUses.countRegister(BaseReg, LUIdx);
3392 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
4059 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
4107 for (const SCEV *Use : RegUses) {
4114 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
4141 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
4356 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
4360 RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
4394 LU.RecomputeRegs(LUIdx, RegUses);
4483 LU.RecomputeRegs(LUIdx, RegUses);
4543 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
4613 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
4618 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
4661 LU.RecomputeRegs(LUIdx, RegUses);
4713 LU.RecomputeRegs(LUIdx, RegUses);
4778 for (const SCEV *Reg : RegUses) {
4846 LU.RecomputeRegs(LUIdx, RegUses);
4874 for (const SCEV *Reg : RegUses) {
4879 BestNum = RegUses.getUsedByIndices(Reg).count();
4881 unsigned Count = RegUses.getUsedByIndices(Reg).count();
4915 LU.RecomputeRegs(LUIdx, RegUses);
5647 RegUses.clear();