Lines Matching defs:Val
2272 SDValue Val = N->getOperand(1);
2274 EVT ValVT = Val.getValueType();
2357 SDValue E0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f16, Val,
2359 SDValue E1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f16, Val,
2367 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Val,
4310 StringRef Val = Attr.getValueAsString();
4311 if (Val == "true")
4451 SDValue Val = N->getOperand(0);
4454 if (isa<ConstantSDNode>(Val)) {
4455 std::swap(Val, Mask);
4460 if (Val.getOpcode() == ISD::ANY_EXTEND) {
4461 AExt = Val;
4462 Val = Val->getOperand(0);
4465 if (Val->isMachineOpcode() && Val->getMachineOpcode() == NVPTX::IMOV16rr) {
4466 Val = Val->getOperand(0);
4469 if (Val->getOpcode() == NVPTXISD::LoadV2 ||
4470 Val->getOpcode() == NVPTXISD::LoadV4) {
4483 MemSDNode *Mem = dyn_cast<MemSDNode>(Val);
4496 cast<ConstantSDNode>(Val->getOperand(Val->getNumOperands()-1))->
4507 Val = DCI.DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N),
4508 AExt.getValueType(), Val);
4513 DCI.CombineTo(N, Val, AddTo);
4603 const APInt &Val = CI->getAPIntValue();
4605 return Val.isIntN(OptSize);
4607 return Val.isSignedIntN(OptSize);