Lines Matching refs:RegInfo
1177 const TargetRegisterInfo &RegInfo) {
1180 ToReg = RegInfo.getSubReg(ToReg, SubIdx);
1184 MO.substPhysReg(ToReg, RegInfo);
1190 MO.substVirtReg(ToReg, SubIdx, RegInfo);
1821 const TargetRegisterInfo *RegInfo,
1825 MCRegAliasIterator(IncomingReg, RegInfo, false).isValid();
1856 if (RegInfo->isSuperRegister(IncomingReg, Reg))
1858 if (RegInfo->isSubRegister(IncomingReg, Reg))
1887 const TargetRegisterInfo *RegInfo) {
1889 RegInfo = nullptr;
1894 if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg)
1900 const TargetRegisterInfo *RegInfo,
1904 MCRegAliasIterator(Reg, RegInfo, false).isValid();
1921 if (RegInfo->isSuperRegister(Reg, MOReg))
1923 if (RegInfo->isSubRegister(Reg, MOReg))
1969 const TargetRegisterInfo *RegInfo) {
1971 MachineOperand *MO = findRegisterDefOperand(Reg, false, false, RegInfo);