Lines Matching refs:UL
93 #define SMU_POST_CONTEXT_PORT_CONTEXT_INDEX_SHIFT (0UL)
95 #define SMU_POST_CONTEXT_PORT_LOGICAL_PORT_INDEX_SHIFT (12UL)
97 #define SMU_POST_CONTEXT_PORT_PROTOCOL_ENGINE_SHIFT (16UL)
99 #define SMU_POST_CONTEXT_PORT_COMMAND_CONTEXT_SHIFT (18UL)
107 #define SMU_INTERRUPT_STATUS_COMPLETION_SHIFT (31UL)
109 #define SMU_INTERRUPT_STATUS_QUEUE_SUSPEND_SHIFT (1UL)
111 #define SMU_INTERRUPT_STATUS_QUEUE_ERROR_SHIFT (0UL)
123 #define SMU_INTERRUPT_MASK_COMPLETION_SHIFT (31UL)
125 #define SMU_INTERRUPT_MASK_QUEUE_SUSPEND_SHIFT (1UL)
127 #define SMU_INTERRUPT_MASK_QUEUE_ERROR_SHIFT (0UL)
139 #define SMU_INTERRUPT_COALESCING_CONTROL_TIMER_SHIFT (0UL)
141 #define SMU_INTERRUPT_COALESCING_CONTROL_NUMBER_SHIFT (8UL)
149 #define SMU_TASK_CONTEXT_RANGE_START_SHIFT (0UL)
151 #define SMU_TASK_CONTEXT_RANGE_ENDING_SHIFT (16UL)
153 #define SMU_TASK_CONTEXT_RANGE_ENABLE_SHIFT (31UL)
165 #define SMU_COMPLETION_QUEUE_PUT_POINTER_SHIFT (0UL)
167 #define SMU_COMPLETION_QUEUE_PUT_CYCLE_BIT_SHIFT (15UL)
169 #define SMU_COMPLETION_QUEUE_PUT_EVENT_POINTER_SHIFT (16UL)
171 #define SMU_COMPLETION_QUEUE_PUT_EVENT_CYCLE_BIT_SHIFT (26UL)
183 #define SMU_COMPLETION_QUEUE_GET_POINTER_SHIFT (0UL)
185 #define SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT (15UL)
187 #define SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT (16UL)
189 #define SMU_COMPLETION_QUEUE_GET_EVENT_CYCLE_BIT_SHIFT (26UL)
191 #define SMU_COMPLETION_QUEUE_GET_ENABLE_SHIFT (30UL)
193 #define SMU_COMPLETION_QUEUE_GET_EVENT_ENABLE_SHIFT (31UL)
214 #define SMU_COMPLETION_QUEUE_CONTROL_QUEUE_LIMIT_SHIFT (0UL)
216 #define SMU_COMPLETION_QUEUE_CONTROL_EVENT_LIMIT_SHIFT (16UL)
231 #define SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT (0UL)
233 #define SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT (12UL)
235 #define SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT (15UL)
237 #define SMU_DEVICE_CONTEXT_CAPACITY_MAX_PEG_SHIFT (27UL)
269 #define SMU_CLOCK_GATING_CONTROL_IDLE_ENABLE_SHIFT (0UL)
271 #define SMU_CLOCK_GATING_CONTROL_XCLK_ENABLE_SHIFT (1UL)
273 #define SMU_CLOCK_GATING_CONTROL_TXCLK_ENABLE_SHIFT (2UL)
275 #define SMU_CLOCK_GATING_CONTROL_REGCLK_ENABLE_SHIFT (3UL)
277 #define SMU_CLOCK_GATING_CONTROL_IDLE_TIMEOUT_SHIFT (16UL)
279 #define SMU_CLOCK_GATING_CONTROL_FORCE_IDLE_SHIFT (31UL)
291 #define SMU_CONTROL_STATUS_TASK_CONTEXT_RANGE_ENABLE_SHIFT (0UL)
293 #define SMU_CONTROL_STATUS_COMPLETION_BYTE_SWAP_ENABLE_SHIFT (1UL)
295 #define SMU_CONTROL_STATUS_CONTEXT_RAM_INIT_COMPLETED_SHIFT (16UL)
297 #define SMU_CONTROL_STATUS_SCHEDULER_RAM_INIT_COMPLETED_SHIFT (17UL)
318 #define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE0_SHIFT (0UL)
320 #define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE1_SHIFT (1UL)
322 #define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE2_SHIFT (2UL)
324 #define SMU_SOFTRESET_CONTROL_RESET_PEG0_PE3_SHIFT (3UL)
326 #define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE0_SHIFT (8UL)
328 #define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE1_SHIFT (9UL)
330 #define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE2_SHIFT (10UL)
332 #define SMU_SOFTRESET_CONTROL_RESET_PEG1_PE3_SHIFT (11UL)
336 ((1UL << (pe)) << ((peg) * 8UL))
352 #define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG0_LP0_SHIFT (16UL)
354 #define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG0_LP2_SHIFT (17UL)
356 #define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG1_LP0_SHIFT (18UL)
358 #define SMU_SOFTRESET_CONTROL_RESET_WIDE_PORT_PEG1_LP2_SHIFT (19UL)
362 ((1UL << ((wide_port) / 2)) << ((peg) * 2UL) << 16UL)
364 #define SMU_SOFTRESET_CONTROL_RESET_PEG0_SHIFT (20UL)
366 #define SMU_SOFTRESET_CONTROL_RESET_PEG1_SHIFT (21UL)
368 #define SMU_SOFTRESET_CONTROL_RESET_SCU_SHIFT (22UL)
375 (1UL << ((peg) + 20)) \
392 #define SMU_TASK_CONTEXT_ASSIGNMENT_STARTING_SHIFT (0UL)
394 #define SMU_TASK_CONTEXT_ASSIGNMENT_ENDING_SHIFT (16UL)
396 #define SMU_TASK_CONTEXT_ASSIGNMENT_RANGE_CHECK_ENABLE_SHIFT (31UL)
407 #define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_CONTROL_QUEUE_SIZE_SHIFT (0UL)
418 #define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_POINTER_SHIFT (0UL)
420 #define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_PUT_CYCLE_BIT_SHIFT (12UL)
433 #define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_POINTER_SHIFT (0UL)
435 #define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_CYCLE_BIT_SHIFT (12UL)
436 #define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_CYCLE_BIT_MASK (12UL)
437 #define SCU_SDMA_UNSOLICITED_FRAME_QUEUE_GET_ENABLE_BIT_SHIFT (31UL)
463 #define SCU_PDMA_CONFIGURATION_ADDRESS_MODIFIER_SHIFT (0UL)
465 #define SCU_PDMA_CONFIGURATION_PCI_RELAXED_ORDERING_ENABLE_SHIFT (16UL)
467 #define SCU_PDMA_CONFIGURATION_PCI_NO_SNOOP_ENABLE_SHIFT (17UL)
469 #define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_BYTE_SWAP_SHIFT (18UL)
471 #define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_SGL_FETCH_SHIFT (19UL)
473 #define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_RX_HEADER_RAM_WRITE_SHIFT (20UL)
475 #define SCU_PDMA_CONFIGURATION_BIG_ENDIAN_CONTROL_XPI_UF_ADDRESS_FETCH_SHIFT (21UL)
477 #define SCU_PDMA_CONFIGURATION_ADDRESS_MODIFIER_SELECT_SHIFT (22UL)
491 #define SCU_CDMA_CONFIGURATION_PCI_RELAXED_ORDERING_ENABLE_SHIFT (8UL)
500 #define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_TIMEOUT_SHIFT (0UL)
502 #define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_LOCK_TIME_SHIFT (8UL)
504 #define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_RATE_CHANGE_DELAY_SHIFT (16UL)
506 #define SCU_LINK_LAYER_SPEED_NEGOTIATION_TIMER_VALUES_DWORD_SYNC_TIMEOUT_SHIFT (24UL)
516 #define SCU_LINK_STATUS_DWORD_SYNC_AQUIRED_SHIFT (2UL)
518 #define SCU_LINK_STATUS_TRANSMIT_PORT_SELECTION_DONE_SHIFT (4UL)
520 #define SCU_LINK_STATUS_RECEIVER_CREDIT_EXHAUSTED_SHIFT (5UL)
533 #define SCU_SAS_MAX_ARBITRATION_WAIT_TIME_TIMEOUT_VALUE_SHIFT (0UL)
535 #define SCU_SAS_MAX_ARBITRATION_WAIT_TIME_TIMEOUT_SCALE_SHIFT (15UL)
548 #define SCU_SAS_TRANSMIT_IDENTIFICATION_SMP_TARGET_SHIFT (1UL)
550 #define SCU_SAS_TRANSMIT_IDENTIFICATION_STP_TARGET_SHIFT (2UL)
552 #define SCU_SAS_TRANSMIT_IDENTIFICATION_SSP_TARGET_SHIFT (3UL)
554 #define SCU_SAS_TRANSMIT_IDENTIFICATION_DA_SATA_HOST_SHIFT (8UL)
556 #define SCU_SAS_TRANSMIT_IDENTIFICATION_SMP_INITIATOR_SHIFT (9UL)
558 #define SCU_SAS_TRANSMIT_IDENTIFICATION_STP_INITIATOR_SHIFT (10UL)
560 #define SCU_SAS_TRANSMIT_IDENTIFICATION_SSP_INITIATOR_SHIFT (11UL)
562 #define SCU_SAS_TRANSMIT_IDENTIFICATION_REASON_CODE_SHIFT (16UL)
564 #define SCU_SAS_TRANSMIT_IDENTIFICATION_ADDRESS_FRAME_TYPE_SHIFT (24UL)
566 #define SCU_SAS_TRANSMIT_IDENTIFICATION_DEVICE_TYPE_SHIFT (28UL)
577 #define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_BREAK_REPLY_CAPABLE_SHIFT (16UL)
579 #define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_REQUESTED_INSIDE_ZPSDS_SHIFT (17UL)
581 #define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_INSIDE_ZPSDS_PERSISTENT_SHIFT (18UL)
583 #define SCU_LINK_LAYER_IDENTIFY_FRAME_PHY_IDENTIFIER_ID_SHIFT (24UL)
594 #define SCU_SAS_PHY_CONFIGURATION_TX_PARITY_CHECK_SHIFT (4UL)
596 #define SCU_SAS_PHY_CONFIGURATION_TX_BAD_CRC_SHIFT (6UL)
598 #define SCU_SAS_PHY_CONFIGURATION_DISABLE_SCRAMBLER_SHIFT (7UL)
600 #define SCU_SAS_PHY_CONFIGURATION_DISABLE_DESCRAMBLER_SHIFT (8UL)
602 #define SCU_SAS_PHY_CONFIGURATION_DISABLE_CREDIT_INSERTION_SHIFT (9UL)
604 #define SCU_SAS_PHY_CONFIGURATION_SUSPEND_PROTOCOL_ENGINE_SHIFT (11UL)
606 #define SCU_SAS_PHY_CONFIGURATION_SATA_SPINUP_HOLD_SHIFT (12UL)
608 #define SCU_SAS_PHY_CONFIGURATION_TRANSMIT_PORT_SELECTION_SIGNAL_SHIFT (13UL)
610 #define SCU_SAS_PHY_CONFIGURATION_HARD_RESET_SHIFT (14UL)
612 #define SCU_SAS_PHY_CONFIGURATION_OOB_ENABLE_SHIFT (15UL)
614 #define SCU_SAS_PHY_CONFIGURATION_ENABLE_FRAME_TX_INSERT_ALIGN_SHIFT (23UL)
616 #define SCU_SAS_PHY_CONFIGURATION_FORWARD_IDENTIFY_FRAME_SHIFT (27UL)
618 #define SCU_SAS_PHY_CONFIGURATION_DISABLE_BYTE_TRANSPOSE_STP_FRAME_SHIFT (28UL)
620 #define SCU_SAS_PHY_CONFIGURATION_OOB_RESET_SHIFT (29UL)
622 #define SCU_SAS_PHY_CONFIGURATION_THREE_IAF_ENABLE_SHIFT (30UL)
624 #define SCU_SAS_PHY_CONFIGURATION_OOB_ALIGN0_ENABLE_SHIFT (31UL)
633 #define SCU_LINK_LAYER_ALIGN_INSERTION_FREQUENCY_GENERAL_SHIFT (0UL)
635 #define SCU_LINK_LAYER_ALIGN_INSERTION_FREQUENCY_CONNECTED_SHIFT (16UL)
641 #define SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_COUNT_SHIFT (0UL)
643 #define SCU_LINK_LAYER_ENABLE_SPINUP_CONTROL_ENABLE_SHIFT (31UL)
654 #define SCU_LINK_LAYER_PHY_CAPABILITIES_TXSSCTYPE_SHIFT (1UL)
656 #define SCU_LINK_LAYER_PHY_CAPABILITIES_RLLRATE_SHIFT (4UL)
658 #define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO15GBPS_SHIFT (8UL)
660 #define SCU_LINK_LAYER_PHY_CAPABILITIES_SW15GBPS_SHIFT (9UL)
662 #define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO30GBPS_SHIFT (10UL)
664 #define SCU_LINK_LAYER_PHY_CAPABILITIES_SW30GBPS_SHIFT (11UL)
666 #define SCU_LINK_LAYER_PHY_CAPABILITIES_SWO60GBPS_SHIFT (12UL)
668 #define SCU_LINK_LAYER_PHY_CAPABILITIES_SW60GBPS_SHIFT (13UL)
670 #define SCU_LINK_LAYER_PHY_CAPABILITIES_EVEN_PARITY_SHIFT (31UL)
683 #define SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_VIRTUAL_EXPANDER_PHY_ZONE_GROUP_SHIFT (0UL)
685 #define SCU_LINK_LAYER_PHY_SOURCE_ZONE_GROUP_CONTROL_INSIDE_SOURCE_ZONE_GROUP_SHIFT (31UL)
695 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE0_LOCKED_SHIFT (1UL)
697 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE0_UPDATING_SHIFT (2UL)
699 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE1_LOCKED_SHIFT (4UL)
701 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZONE1_UPDATING_SHIFT (5UL)
703 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE0_SHIFT (16UL)
705 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE0_SHIFT (19UL)
707 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE1_SHIFT (20UL)
709 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE1_SHIFT (23UL)
711 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE2_SHIFT (24UL)
713 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE2_SHIFT (27UL)
715 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_ZPT_ASSOCIATION_PE3_SHIFT (28UL)
717 #define SCU_PROTOCOL_ENGINE_GROUP_VIRTUAL_ZONING_EXPANDER_CONTROL_AIP_ENABLE_PE3_SHIFT (31UL)
731 #define SCU_PTSG_CONTROL_IT_NEXUS_TIMEOUT_SHIFT (0UL)
733 #define SCU_PTSG_CONTROL_TASK_TIMEOUT_SHIFT (16UL)
735 #define SCU_PTSG_CONTROL_PTSG_ENABLE_SHIFT (24UL)
737 #define SCU_PTSG_CONTROL_ETM_ENABLE_SHIFT (25UL)
751 #define SCU_PTSG_REAL_TIME_CLOCK_SHIFT (0UL)
759 #define SCU_PTSG_REAL_TIME_CLOCK_CONTROL_PRESCALER_VALUE_SHIFT (0UL)
767 #define SCU_PTSG_PORT_TASK_SCHEDULER_CONTROL_SUSPEND_SHIFT (0UL)
769 #define SCU_PTSG_PORT_TASK_SCHEDULER_CONTROL_ENABLE_SHIFT (1UL)
777 #define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_NEXT_RN_VALID_SHIFT (0UL)
779 #define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_ACTIVE_RNSC_LIST_VALID_SHIFT (1UL)
781 #define SCU_PTSG_PORT_TASK_SCHEDULER_STATUS_PTS_SUSPENDED_SHIFT (2UL)
792 #define SCU_SGPIO_CONTROL_SGPIO_ENABLE_SHIFT (0UL)
794 #define SCU_SGPIO_CONTROL_SGPIO_SERIAL_CLOCK_SELECT_SHIFT (1UL)
796 #define SCU_SGPIO_CONTROL_SGPIO_SERIAL_SHIFT_WIDTH_SELECT_SHIFT (2UL)
798 #define SCU_SGPIO_CONTROL_SGPIO_TEST_BIT_SHIFT (15UL)
805 #define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R0_SHIFT (0UL)
807 #define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R1_SHIFT (4UL)
809 #define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R2_SHIFT (8UL)
811 #define SCU_SGPIO_PROGRAMMABLE_BLINK_REGISTER_R3_SHIFT (12UL)
818 #define SCU_SGPIO_START_DRIVE_LOWER_R0_SHIFT (0UL)
820 #define SCU_SGPIO_START_DRIVE_LOWER_R1_SHIFT (4UL)
822 #define SCU_SGPIO_START_DRIVE_LOWER_R2_SHIFT (8UL)
824 #define SCU_SGPIO_START_DRIVE_LOWER_R3_SHIFT (12UL)
831 #define SCU_SGPIO_START_DRIVE_UPPER_R0_SHIFT (0UL)
833 #define SCU_SGPIO_START_DRIVE_UPPER_R1_SHIFT (4UL)
835 #define SCU_SGPIO_START_DRIVE_UPPER_R2_SHIFT (8UL)
837 #define SCU_SGPIO_START_DRIVE_UPPER_R3_SHIFT (12UL)
844 #define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D0_SHIFT (0UL)
846 #define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D1_SHIFT (4UL)
848 #define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D2_SHIFT (8UL)
850 #define SCU_SGPIO_SERIAL_INPUT_DATA_LOWER_D3_SHIFT (12UL)
857 #define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D0_SHIFT (0UL)
859 #define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D1_SHIFT (4UL)
861 #define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D2_SHIFT (8UL)
863 #define SCU_SGPIO_SERIAL_INPUT_DATA_UPPER_D3_SHIFT (12UL)
870 #define SCU_SGPIO_VENDOR_SPECIFIC_CODE_SHIFT (0UL)
877 #define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA0_SHIFT (0UL)
879 #define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA0_SHIFT (2UL)
881 #define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA0_SHIFT (3UL)
883 #define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA1_SHIFT (4UL)
885 #define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA1_SHIFT (6UL)
887 #define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA1_SHIFT (7UL)
889 #define SCU_SGPIO_OUPUT_DATA_SELECT_INPUT_DATA2_SHIFT (8UL)
891 #define SCU_SGPIO_OUPUT_DATA_SELECT_INVERT_INPUT_DATA2_SHIFT (10UL)
893 #define SCU_SGPIO_OUPUT_DATA_SELECT_JOG_ENABLE_DATA2_SHIFT (11UL)
1114 #define SCU_TLCR_HASH_SAS_CHECKING_ENABLE_SHIFT (0UL)
1116 #define SCU_TLCR_CLEAR_TCI_NCQ_MAPPING_TABLE_SHIFT (1UL)
1118 #define SCU_TLCR_STP_WRITE_DATA_PREFETCH_SHIFT (3UL)
1120 #define SCU_TLCR_CMD_NAK_STATUS_CODE_SHIFT (4UL)
1217 #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_ALIGN_DETECTION_SHIFT (0UL)
1219 #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_HOT_PLUG_SHIFT (8UL)
1221 #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_COMSAS_DETECTION_SHIFT (16UL)
1223 #define SCU_SAS_PHY_TIMER_TIMEOUT_VALUES_RATE_CHANGE_SHIFT (24UL)
1229 #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_SHIFT (0UL)
1231 #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN1 (0UL)
1232 #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN2 (1UL)
1233 #define SCU_SAS_LINK_LAYER_CONTROL_MAX_LINK_RATE_GEN3 (2UL)
1234 #define SCU_SAS_LINK_LAYER_CONTROL_BROADCAST_PRIMITIVE_SHIFT (2UL)
1236 #define SCU_SAS_LINK_LAYER_CONTROL_CLOSE_NO_ACTIVE_TASK_DISABLE_SHIFT (16UL)
1238 #define SCU_SAS_LINK_LAYER_CONTROL_CLOSE_NO_OUTBOUND_TASK_DISABLE_SHIFT (17UL)
1240 #define SCU_SAS_LINK_LAYER_CONTROL_NO_OUTBOUND_TASK_TIMEOUT_SHIFT (24UL)