Lines Matching refs:mphy_ctrl
4109 u32 mphy_ctrl = 0;
4121 mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
4122 if (mphy_ctrl & E1000_MPHY_DIS_ACCESS) {
4127 mphy_ctrl |= E1000_MPHY_ENA_ACCESS;
4128 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, mphy_ctrl);
4137 mphy_ctrl = (mphy_ctrl & ~E1000_MPHY_ADDRESS_MASK &
4140 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, mphy_ctrl);
4171 u32 mphy_ctrl = 0;
4183 mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
4184 if (mphy_ctrl & E1000_MPHY_DIS_ACCESS) {
4189 mphy_ctrl |= E1000_MPHY_ENA_ACCESS;
4190 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, mphy_ctrl);
4200 mphy_ctrl |= E1000_MPHY_ADDRESS_FNC_OVERRIDE;
4202 mphy_ctrl &= ~E1000_MPHY_ADDRESS_FNC_OVERRIDE;
4203 mphy_ctrl = (mphy_ctrl & ~E1000_MPHY_ADDRESS_MASK) |
4205 E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, mphy_ctrl);
4233 u32 mphy_ctrl = 0;
4237 mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);
4238 if (mphy_ctrl & E1000_MPHY_BUSY) {