dev/ixgbe/ixgbe_api.h

40 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map);
42 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
44 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
45 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
46 extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw);
47 extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);
48 extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);
49 extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw);
50 extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw);
52 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
53 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
54 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
55 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
56 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
57 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
58 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
59 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
60 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
61 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
62 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
63 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
64 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
65 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
67 s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
68 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
69 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
71 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
74 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
75 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw);
76 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
79 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
83 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
84 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
85 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
86 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
88 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
90 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
92 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
94 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
95 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
96 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
97 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
99 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
100 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
101 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
103 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
104 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
107 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
108 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
110 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
111 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
113 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
114 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
115 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);
116 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
117 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
118 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
119 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
121 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
124 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
125 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
126 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
127 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
128 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
130 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
133 s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
134 s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
135 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
137 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
138 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
140 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
141 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
142 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
143 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
144 u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
145 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
146 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw);
147 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw);
148 s32 ixgbe_mng_fw_enabled(struct ixgbe_hw *hw);
149 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
150 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
151 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
153 void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
157 s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
159 s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
162 s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
165 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
175 bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw);
176 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
178 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
180 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
181 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
182 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
184 void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue);
185 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
187 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
188 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
189 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
190 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
191 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
192 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
193 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
194 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
195 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw);
196 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
198 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
199 s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status);
200 s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
201 s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value);
202 bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg);
203 s32 ixgbe_dmac_config(struct ixgbe_hw *hw);
204 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw);
205 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw);
206 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee);
207 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
209 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable,
211 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
213 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
215 void ixgbe_disable_mdd(struct ixgbe_hw *hw);
216 void ixgbe_enable_mdd(struct ixgbe_hw *hw);
217 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);
218 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);
219 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw);
220 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw);
221 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed);
222 void ixgbe_disable_rx(struct ixgbe_hw *hw);
223 void ixgbe_enable_rx(struct ixgbe_hw *hw);
224 s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,