dev/ixgb/ixgb_hw.c

45 static uint32_t ixgb_hash_mc_addr(struct ixgb_hw *hw,
48 static void ixgb_mta_set(struct ixgb_hw *hw,
51 static void ixgb_get_bus_info(struct ixgb_hw *hw);
53 static boolean_t ixgb_link_reset(struct ixgb_hw *hw);
55 static void ixgb_optics_reset(struct ixgb_hw *hw);
57 static ixgb_phy_type ixgb_identify_phy(struct ixgb_hw *hw);
59 uint32_t ixgb_mac_reset (struct ixgb_hw* hw);
61 uint32_t ixgb_mac_reset (struct ixgb_hw* hw)
79     IXGB_WRITE_REG_IO(hw, CTRL0, ctrl_reg);
81     IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);
86     ctrl_reg = IXGB_READ_REG(hw, CTRL0);
92     if (hw->phy_type == ixgb_phy_type_txn17401) {
97         ixgb_optics_reset(hw);
107  * hw - Struct containing variables accessed by shared code
110 ixgb_adapter_stop(struct ixgb_hw *hw)
120     if(hw->adapter_stopped) {
128     hw->adapter_stopped = TRUE;
132     IXGB_WRITE_REG(hw, IMC, 0xFFFFFFFF);
138     IXGB_WRITE_REG(hw, RCTL, IXGB_READ_REG(hw, RCTL) & ~IXGB_RCTL_RXEN);
139     IXGB_WRITE_REG(hw, TCTL, IXGB_READ_REG(hw, TCTL) & ~IXGB_TCTL_TXEN);
149     ctrl_reg = ixgb_mac_reset(hw);
153     IXGB_WRITE_REG(hw, IMC, 0xffffffff);
156     icr_reg = IXGB_READ_REG(hw, ICR);
167  * hw - Struct containing variables accessed by shared code.
172 ixgb_identify_xpak_vendor(struct ixgb_hw *hw)
184         vendor_name[i] = ixgb_read_phy_reg( hw,
209  * hw - Struct containing variables accessed by shared code.  The device_id
215 ixgb_identify_phy(struct ixgb_hw *hw)
223     switch (hw->device_id) {
233             xpak_vendor = ixgb_identify_xpak_vendor(hw);
257  * hw - Struct containing variables accessed by shared code
272 ixgb_init_hw(struct ixgb_hw *hw)
287     ctrl_reg = ixgb_mac_reset(hw);
292     IXGB_WRITE_REG_IO(hw, CTRL1, IXGB_CTRL1_EE_RST);
294     IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST);
300     if (ixgb_get_eeprom_data(hw) == FALSE) {
305     hw->device_id = ixgb_get_ee_device_id(hw);
306     hw->phy_type  = ixgb_identify_phy(hw);
311     ixgb_init_rx_addrs(hw);
317     if (!mac_addr_valid(hw->curr_mac_addr)) {
323     hw->adapter_stopped = FALSE;
326     ixgb_get_bus_info(hw);
331         IXGB_WRITE_REG_ARRAY(hw, MTA, i, 0);
334     ixgb_clear_vfta(hw);
337     ixgb_clear_hw_cntrs(hw);
340     status = ixgb_setup_fc(hw);
343     ixgb_check_for_link(hw);
351  * hw - Struct containing variables accessed by shared code
358 ixgb_init_rx_addrs(struct ixgb_hw *hw)
369     if (!mac_addr_valid(hw->curr_mac_addr)) {
372            ixgb_get_ee_mac_addr(hw, hw->curr_mac_addr);
375                                             hw->curr_mac_addr[0],
376                                             hw->curr_mac_addr[1],
377                                             hw->curr_mac_addr[2]);
379                                             hw->curr_mac_addr[3],
380                                             hw->curr_mac_addr[4],
381                                             hw->curr_mac_addr[5]);
387                                         hw->curr_mac_addr[0],
388                                         hw->curr_mac_addr[1],
389                                         hw->curr_mac_addr[2]);
391                                         hw->curr_mac_addr[3],
392                                         hw->curr_mac_addr[4],
393                                         hw->curr_mac_addr[5]);
396             ixgb_rar_set(hw, hw->curr_mac_addr, 0);
402         IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
403         IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
412  * hw - Struct containing variables accessed by shared code
423 ixgb_mc_addr_list_update(struct ixgb_hw *hw,
435     hw->num_mc_addrs = mc_addr_count;
440         IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
441         IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
447         IXGB_WRITE_REG_ARRAY(hw, MTA, i, 0);
465             ixgb_rar_set(hw,
471              hash_value = ixgb_hash_mc_addr(hw,
477             ixgb_mta_set(hw, hash_value);
488  * hw - Struct containing variables accessed by shared code
495 ixgb_hash_mc_addr(struct ixgb_hw *hw,
505     switch (hw->mc_filter_type) {
536  * hw - Struct containing variables accessed by shared code
540 ixgb_mta_set(struct ixgb_hw *hw,
557     mta_reg = IXGB_READ_REG_ARRAY(hw, MTA, hash_reg);
561     IXGB_WRITE_REG_ARRAY(hw, MTA, hash_reg, mta_reg);
569  * hw - Struct containing variables accessed by shared code
574 ixgb_rar_set(struct ixgb_hw *hw,
594     IXGB_WRITE_REG_ARRAY(hw, RA, (index << 1), rar_low);
595     IXGB_WRITE_REG_ARRAY(hw, RA, ((index << 1) + 1), rar_high);
602  * hw - Struct containing variables accessed by shared code
607 ixgb_write_vfta(struct ixgb_hw *hw,
611     IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, value);
618  * hw - Struct containing variables accessed by shared code
621 ixgb_clear_vfta(struct ixgb_hw *hw)
626         IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0);
633  * hw - Struct containing variables accessed by shared code
637 ixgb_setup_fc(struct ixgb_hw *hw)
646     ctrl_reg = IXGB_READ_REG(hw, CTRL0);
660     switch (hw->fc.type) {
676         pap_reg = hw->fc.pause_time;
683         pap_reg = hw->fc.pause_time;
693     IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);
696         IXGB_WRITE_REG(hw, PAP, pap_reg);
705     if(!(hw->fc.type & ixgb_fc_tx_pause)) {
706         IXGB_WRITE_REG(hw, FCRTL, 0);
707         IXGB_WRITE_REG(hw, FCRTH, 0);
712         if(hw->fc.send_xon) {
713             IXGB_WRITE_REG(hw, FCRTL,
714                             (hw->fc.low_water | IXGB_FCRTL_XONE));
716             IXGB_WRITE_REG(hw, FCRTL, hw->fc.low_water);
718         IXGB_WRITE_REG(hw, FCRTH, hw->fc.high_water);
727  * hw          - Struct containing variables accessed by hw code
739 ixgb_read_phy_reg(struct ixgb_hw *hw,
758     IXGB_WRITE_REG(hw, MSCA, command);
771         command = IXGB_READ_REG(hw, MSCA);
785     IXGB_WRITE_REG(hw, MSCA, command);
798         command = IXGB_READ_REG(hw, MSCA);
809     data = IXGB_READ_REG(hw, MSRWD);
818  * hw          - Struct containing variables accessed by hw code
832 ixgb_write_phy_reg(struct ixgb_hw *hw,
846     IXGB_WRITE_REG(hw, MSRWD, (uint32_t)data);
854     IXGB_WRITE_REG(hw, MSCA, command);
867         command = IXGB_READ_REG(hw, MSCA);
881     IXGB_WRITE_REG(hw, MSCA, command);
894         command = IXGB_READ_REG(hw, MSCA);
909  * hw - Struct containing variables accessed by hw code
914 ixgb_check_for_link(struct ixgb_hw *hw)
921     xpcss_reg = IXGB_READ_REG(hw, XPCSS);
922     status_reg = IXGB_READ_REG(hw, STATUS);
926        hw->link_up = TRUE;
930         hw->link_up = ixgb_link_reset(hw);
936         hw->link_up = ixgb_link_reset(hw);
946  * hw - Struct containing variables accessed by hw code
950 boolean_t ixgb_check_for_bad_link(struct ixgb_hw *hw)
955     if (hw->phy_type == ixgb_phy_type_txn17401) {
956         newLFC = IXGB_READ_REG(hw, LFC);
957         newRFC = IXGB_READ_REG(hw, RFC);
958         if ((hw->lastLFC + 250 < newLFC) || (hw->lastRFC + 250 < newRFC)) {
962         hw->lastLFC = newLFC;
963         hw->lastRFC = newRFC;
973  * hw - Struct containing variables accessed by shared code
976 ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
983     if(hw->adapter_stopped) {
988     temp_reg = IXGB_READ_REG(hw, TPRL);
989     temp_reg = IXGB_READ_REG(hw, TPRH);
990     temp_reg = IXGB_READ_REG(hw, GPRCL);
991     temp_reg = IXGB_READ_REG(hw, GPRCH);
992     temp_reg = IXGB_READ_REG(hw, BPRCL);
993     temp_reg = IXGB_READ_REG(hw, BPRCH);
994     temp_reg = IXGB_READ_REG(hw, MPRCL);
995     temp_reg = IXGB_READ_REG(hw, MPRCH);
996     temp_reg = IXGB_READ_REG(hw, UPRCL);
997     temp_reg = IXGB_READ_REG(hw, UPRCH);
998     temp_reg = IXGB_READ_REG(hw, VPRCL);
999     temp_reg = IXGB_READ_REG(hw, VPRCH);
1000     temp_reg = IXGB_READ_REG(hw, JPRCL);
1001     temp_reg = IXGB_READ_REG(hw, JPRCH);
1002     temp_reg = IXGB_READ_REG(hw, GORCL);
1003     temp_reg = IXGB_READ_REG(hw, GORCH);
1004     temp_reg = IXGB_READ_REG(hw, TORL);
1005     temp_reg = IXGB_READ_REG(hw, TORH);
1006     temp_reg = IXGB_READ_REG(hw, RNBC);
1007     temp_reg = IXGB_READ_REG(hw, RUC);
1008     temp_reg = IXGB_READ_REG(hw, ROC);
1009     temp_reg = IXGB_READ_REG(hw, RLEC);
1010     temp_reg = IXGB_READ_REG(hw, CRCERRS);
1011     temp_reg = IXGB_READ_REG(hw, ICBC);
1012     temp_reg = IXGB_READ_REG(hw, ECBC);
1013     temp_reg = IXGB_READ_REG(hw, MPC);
1014     temp_reg = IXGB_READ_REG(hw, TPTL);
1015     temp_reg = IXGB_READ_REG(hw, TPTH);
1016     temp_reg = IXGB_READ_REG(hw, GPTCL);
1017     temp_reg = IXGB_READ_REG(hw, GPTCH);
1018     temp_reg = IXGB_READ_REG(hw, BPTCL);
1019     temp_reg = IXGB_READ_REG(hw, BPTCH);
1020     temp_reg = IXGB_READ_REG(hw, MPTCL);
1021     temp_reg = IXGB_READ_REG(hw, MPTCH);
1022     temp_reg = IXGB_READ_REG(hw, UPTCL);
1023     temp_reg = IXGB_READ_REG(hw, UPTCH);
1024     temp_reg = IXGB_READ_REG(hw, VPTCL);
1025     temp_reg = IXGB_READ_REG(hw, VPTCH);
1026     temp_reg = IXGB_READ_REG(hw, JPTCL);
1027     temp_reg = IXGB_READ_REG(hw, JPTCH);
1028     temp_reg = IXGB_READ_REG(hw, GOTCL);
1029     temp_reg = IXGB_READ_REG(hw, GOTCH);
1030     temp_reg = IXGB_READ_REG(hw, TOTL);
1031     temp_reg = IXGB_READ_REG(hw, TOTH);
1032     temp_reg = IXGB_READ_REG(hw, DC);
1033     temp_reg = IXGB_READ_REG(hw, PLT64C);
1034     temp_reg = IXGB_READ_REG(hw, TSCTC);
1035     temp_reg = IXGB_READ_REG(hw, TSCTFC);
1036     temp_reg = IXGB_READ_REG(hw, IBIC);
1037     temp_reg = IXGB_READ_REG(hw, RFC);
1038     temp_reg = IXGB_READ_REG(hw, LFC);
1039     temp_reg = IXGB_READ_REG(hw, PFRC);
1040     temp_reg = IXGB_READ_REG(hw, PFTC);
1041     temp_reg = IXGB_READ_REG(hw, MCFRC);
1042     temp_reg = IXGB_READ_REG(hw, MCFTC);
1043     temp_reg = IXGB_READ_REG(hw, XONRXC);
1044     temp_reg = IXGB_READ_REG(hw, XONTXC);
1045     temp_reg = IXGB_READ_REG(hw, XOFFRXC);
1046     temp_reg = IXGB_READ_REG(hw, XOFFTXC);
1047     temp_reg = IXGB_READ_REG(hw, RJC);
1055  * hw - Struct containing variables accessed by shared code
1058 ixgb_led_on(struct ixgb_hw *hw)
1060     uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
1064     IXGB_WRITE_REG(hw, CTRL0, ctrl0_reg);
1071  * hw - Struct containing variables accessed by shared code
1074 ixgb_led_off(struct ixgb_hw *hw)
1076     uint32_t ctrl0_reg = IXGB_READ_REG(hw, CTRL0);
1080     IXGB_WRITE_REG(hw, CTRL0, ctrl0_reg);
1088  * hw - Struct containing variables accessed by shared code
1091 ixgb_get_bus_info(struct ixgb_hw *hw)
1095     status_reg = IXGB_READ_REG(hw, STATUS);
1097     hw->bus.type = (status_reg & IXGB_STATUS_PCIX_MODE) ?
1100     if (hw->bus.type == ixgb_bus_type_pci) {
1101         hw->bus.speed = (status_reg & IXGB_STATUS_PCI_SPD) ?
1106             hw->bus.speed = ixgb_bus_speed_66;
1109             hw->bus.speed = ixgb_bus_speed_100;
1112             hw->bus.speed = ixgb_bus_speed_133;
1115             hw->bus.speed = ixgb_bus_speed_reserved;
1120     hw->bus.width = (status_reg & IXGB_STATUS_BUS64) ?
1168  * hw - Struct containing variables accessed by shared code
1171 ixgb_link_reset(struct ixgb_hw *hw)
1180        IXGB_WRITE_REG(hw, CTRL0, IXGB_READ_REG(hw, CTRL0) | IXGB_CTRL0_LRST);
1185            link_status = ((IXGB_READ_REG(hw, STATUS) & IXGB_STATUS_LU) &&
1186                (IXGB_READ_REG(hw, XPCSS) & IXGB_XPCSS_ALIGN_STATUS)) ?
1200  * hw - Struct containing variables accessed by shared code
1203 ixgb_optics_reset(struct ixgb_hw *hw)
1205     if (hw->phy_type == ixgb_phy_type_txn17401) {
1208         ixgb_write_phy_reg( hw,
1214         mdio_reg = ixgb_read_phy_reg( hw,